1 #include <hal/acpi/acpi.h>
2 #include <hal/ioapic.h>
3 #include <klibc/stdio.h>
4 #include <lunaix/lxconsole.h>
5 #include <lunaix/peripheral/serial.h>
6 #include <lunaix/syslog.h>
7 #include <sdbg/gdbstub.h>
8 #include <sdbg/lsdbg.h>
9 #include <sdbg/protocol.h>
11 // #define USE_LSDBG_BACKEND
13 volatile int debug_mode = 0;
16 sdbg_loop(const isr_param* param)
18 // This is importnat, because we will handle any subsequent RX/TX in a
19 // synchronized way. And we don't want these irq queue up at our APIC and
20 // confuse the CPU after ACK with APIC.
21 serial_disable_irq(SERIAL_COM1);
22 if (param->vector == 1 || param->vector == 3) {
27 // Oh... C.M.C. is about to help the debugging!
28 if (serial_rx_byte(SERIAL_COM1) != '@') {
31 if (serial_rx_byte(SERIAL_COM1) != 'c') {
34 if (serial_rx_byte(SERIAL_COM1) != 'm') {
37 if (serial_rx_byte(SERIAL_COM1) != 'c') {
42 if (serial_rx_byte(SERIAL_COM1) != '@') {
45 if (serial_rx_byte(SERIAL_COM1) != 'y') {
48 if (serial_rx_byte(SERIAL_COM1) != 'a') {
51 if (serial_rx_byte(SERIAL_COM1) != 'y') {
60 #ifdef USE_LSDBG_BACKEND
61 lunaix_sdbg_loop(param);
68 serial_enable_irq(SERIAL_COM1);
72 ioapic_get_irq(acpi_context* acpi_ctx, uint8_t old_irq);
77 intr_subscribe(UART_COM1, sdbg_loop);
78 intr_subscribe(INSTR_DEBUG, sdbg_loop); // #DB
80 acpi_context* acpi_ctx = acpi_get_context();
81 uint8_t irq = ioapic_get_irq(acpi_ctx, COM1_IRQ);
82 ioapic_redirect(irq, UART_COM1, 0, IOAPIC_DELMOD_FIXED);