lunaix-os/arch/x86/exceptions/intr_routines.c

   1 #include <asm/hart.h>
   2
   3 #include <lunaix/process.h>
   4 #include <lunaix/sched.h>
   5 #include <lunaix/spike.h>
   6 #include <lunaix/syslog.h>
   7 #include <lunaix/trace.h>
   8 #include <lunaix/failsafe.h>
   9
  10 #include <klibc/strfmt.h>
  11
  12 #include <asm/x86_isrm.h>
  13 #include "asm/soc/apic.h"
  14 #include "asm/x86.h"
  15
  16 LOG_MODULE("INTR")
  17
  18 extern void
  19 intr_routine_page_fault(const struct hart_state* state);
  20
  21 extern u32_t debug_resv;
  22
  23 void
  24 __print_panic_msg(const char* msg, const struct hart_state* state)
  25 {
  26     ERROR("panic: %s", msg);
  27     failsafe_diagnostic();
  28 }
  29
  30 void
  31 intr_routine_divide_zero(const struct hart_state* state)
  32 {
  33     __print_panic_msg("div zero", state);
  34 }
  35
  36 void
  37 intr_routine_general_protection(const struct hart_state* state)
  38 {
  39     __print_panic_msg("general protection", state);
  40 }
  41
  42 void
  43 intr_routine_invl_opcode(const struct hart_state* state)
  44 {
  45     __print_panic_msg("invalid opcode", state);
  46 }
  47
  48 void
  49 intr_routine_sys_panic(const struct hart_state* state)
  50 {
  51 #ifdef CONFIG_ARCH_X86_64
  52     __print_panic_msg((char*)(state->registers.rdi), state);
  53 #else
  54     __print_panic_msg((char*)(state->registers.edi), state);
  55 #endif
  56 }
  57
  58 void
  59 intr_routine_fallback(const struct hart_state* state)
  60 {
  61     __print_panic_msg("unknown interrupt", state);
  62 }
  63
  64 /**
  65  * @brief ISR for Spurious interrupt
  66  *
  67  * @param struct hart_state passed by CPU
  68  */
  69 void
  70 intr_routine_apic_spi(const struct hart_state* state)
  71 {
  72     // FUTURE: do nothing for now
  73 }
  74
  75 void
  76 intr_routine_apic_error(const struct hart_state* state)
  77 {
  78     ERROR("APIC error");
  79     failsafe_diagnostic();
  80 }
  81
  82 void
  83 intr_routine_sched(const struct hart_state* state)
  84 {
  85     isrm_notify_eoi(0, LUNAIX_SCHED);
  86     schedule();
  87 }
  88
  89 void
  90 intr_routine_init()
  91 {
  92     isrm_bindiv(FAULT_DIVISION_ERROR, intr_routine_divide_zero);
  93     isrm_bindiv(FAULT_GENERAL_PROTECTION, intr_routine_general_protection);
  94     isrm_bindiv(FAULT_PAGE_FAULT, intr_routine_page_fault);
  95     isrm_bindiv(FAULT_STACK_SEG_FAULT, intr_routine_page_fault);
  96     isrm_bindiv(FAULT_INVALID_OPCODE, intr_routine_invl_opcode);
  97
  98     isrm_bindiv(LUNAIX_SYS_PANIC, intr_routine_sys_panic);
  99     isrm_bindiv(LUNAIX_SCHED, intr_routine_sched);
 100
 101     isrm_bindiv(APIC_SPIV_IV, intr_routine_apic_spi);
 102     isrm_bindiv(APIC_ERROR_IV, intr_routine_apic_error);
 103 }