refactor: rewrite kernel's make script

[lunaix-os.git] / lunaix-os / hal / apic.c

diff --git a/lunaix-os/hal/apic.c b/lunaix-os/hal/apic.c
index 00995252120892cde34712677f641795ea390634..44385a475ca9b28ad020aff07ae0fbecec9f583c 100644 (file)
--- a/lunaix-os/hal/apic.c
+++ b/lunaix-os/hal/apic.c
@@ -39,7 +39,7 @@ apic_init()
     // As we are going to use APIC, disable the old 8259 PIC
     pic_disable();
 
-    _apic_base = ioremap(__APIC_BASE_PADDR, 4096);
+    _apic_base = (ptr_t)ioremap(__APIC_BASE_PADDR, 4096);
 
     // Hardware enable the APIC
     // By setting bit 11 of IA32_APIC_BASE register
@@ -53,8 +53,8 @@ apic_init()
                  : "eax", "ecx", "edx");
 
     // Print the basic information of our current local APIC
-    uint32_t apic_id = apic_read_reg(APIC_IDR) >> 24;
-    uint32_t apic_ver = apic_read_reg(APIC_VER);
+    u32_t apic_id = apic_read_reg(APIC_IDR) >> 24;
+    u32_t apic_ver = apic_read_reg(APIC_VER);
 
     kprintf(KINFO "ID: %x, Version: %x, Max LVT: %u\n",
             apic_id,
@@ -74,7 +74,7 @@ apic_init()
     apic_write_reg(APIC_TPR, APIC_PRIORITY(2, 0));
 
     // enable APIC
-    uint32_t spiv = apic_read_reg(APIC_SPIVR);
+    u32_t spiv = apic_read_reg(APIC_SPIVR);
 
     // install our handler for spurious interrupt.
     spiv = (spiv & ~0xff) | APIC_SPIV_APIC_ENABLE | APIC_SPIV_IV;