PCI 16x50 UART Controller, O2 Enablement (#39)

[lunaix-os.git] / lunaix-os / arch / x86 / exceptions / intr_routines.c

diff --git a/lunaix-os/arch/x86/exceptions/intr_routines.c b/lunaix-os/arch/x86/exceptions/intr_routines.c
index 05f547e9c60c441b8d6c3e52e21fb2b1ea24a90b..d355927dd2b83851a052dbb9532b0153fc1ae669 100644 (file)
--- a/lunaix-os/arch/x86/exceptions/intr_routines.c
+++ b/lunaix-os/arch/x86/exceptions/intr_routines.c
@@ -39,6 +39,12 @@ intr_routine_general_protection(const struct hart_state* state)
     __print_panic_msg("general protection", state);
 }
 
+void
+intr_routine_invl_opcode(const struct hart_state* state)
+{
+    __print_panic_msg("invalid opcode", state);
+}
+
 void
 intr_routine_sys_panic(const struct hart_state* state)
 {
@@ -89,6 +95,7 @@ intr_routine_init()
     isrm_bindiv(FAULT_GENERAL_PROTECTION, intr_routine_general_protection);
     isrm_bindiv(FAULT_PAGE_FAULT, intr_routine_page_fault);
     isrm_bindiv(FAULT_STACK_SEG_FAULT, intr_routine_page_fault);
+    isrm_bindiv(FAULT_INVALID_OPCODE, intr_routine_invl_opcode);
 
     isrm_bindiv(LUNAIX_SYS_PANIC, intr_routine_sys_panic);
     isrm_bindiv(LUNAIX_SCHED, intr_routine_sched);