PCI 16x50 UART Controller, O2 Enablement (#39)

[lunaix-os.git] / lunaix-os / arch / x86 / hal / pci.c

diff --git a/lunaix-os/arch/x86/hal/pci.c b/lunaix-os/arch/x86/hal/pci.c
new file mode 100644 (file)
index 0000000..f1321b2
--- /dev/null
+++ b/lunaix-os/arch/x86/hal/pci.c
@@ -0,0 +1,33 @@
+#include <hal/pci.h>
+#include <sys/port_io.h>
+
+#ifdef CONFIG_PCI_PMIO
+#define PCI_CONFIG_ADDR 0xcf8
+#define PCI_CONFIG_DATA 0xcfc
+
+pci_reg_t
+pci_read_cspace(ptr_t base, int offset)
+{
+    port_wrdword(PCI_CONFIG_ADDR, base | (offset & ~0x3));
+    return port_rddword(PCI_CONFIG_DATA);
+}
+
+void
+pci_write_cspace(ptr_t base, int offset, pci_reg_t data)
+{
+    port_wrdword(PCI_CONFIG_ADDR, base | (offset & ~0x3));
+    port_wrdword(PCI_CONFIG_DATA, data);
+}
+
+#endif
+
+u16_t
+pci_config_msi_data(int vector) {
+    return vector;
+}
+
+ptr_t
+pci_get_msi_base() {
+    return 0xFEE00000;
+}
+