PCI 16x50 UART Controller, O2 Enablement (#39)

[lunaix-os.git] / lunaix-os / hal / char / serial.c

diff --git a/lunaix-os/hal/char/serial.c b/lunaix-os/hal/char/serial.c
index dea044fb668ccbaee58b97d932a870078f746f65..15a9c9ed098113e963c7af5c52af1284d9a45dd2 100644 (file)
--- a/lunaix-os/hal/char/serial.c
+++ b/lunaix-os/hal/char/serial.c
@@ -3,12 +3,15 @@
 #include <lunaix/spike.h>
 #include <lunaix/owloysius.h>
 #include <lunaix/status.h>
+#include <lunaix/syslog.h>
 
 #include <sys/mm/pagetable.h>
 
 #include <hal/serial.h>
 #include <hal/term.h>
 
+LOG_MODULE("serial")
+
 #define lock_sdev(sdev) device_lock((sdev)->dev)
 #define unlock_sdev(sdev) device_unlock((sdev)->dev)
 #define unlock_and_wait(sdev, wq)                                              \
@@ -267,10 +270,13 @@ serial_create(struct devclass* class, char* if_ident)
     
     device_grant_capability(dev, cap_meta(tp_cap));
 
-    register_device(dev, class, "s%d", class->variant);
+    register_device(dev, class, "%s%d", if_ident, class->variant);
 
     term_create(dev, if_ident);
 
+    INFO("interface: %s, %xh:%xh.%d", dev->name_val, 
+            class->fn_grp, class->device, class->variant);
+
     class->variant++;
     return sdev;
 }