feat: No more kernel page table switching upon interrupt.

[lunaix-os.git] / lunaix-os / kernel / asm / x86 / idt.c

diff --git a/lunaix-os/kernel/asm/x86/idt.c b/lunaix-os/kernel/asm/x86/idt.c
index d11d6ed0969a820d8d0ee3f75e4ac765c627f638..6c7246cc9923ecdc7f83d3616f51c53f20104a5c 100644 (file)
--- a/lunaix-os/kernel/asm/x86/idt.c
+++ b/lunaix-os/kernel/asm/x86/idt.c
@@ -7,28 +7,42 @@
 uint64_t _idt[IDT_ENTRY];
 uint16_t _idt_limit = sizeof(_idt) - 1;
 
-void _set_idt_entry(uint32_t vector, uint16_t seg_selector, void (*isr)(), uint8_t dpl) {
+static inline void _set_idt_entry(uint32_t vector, uint16_t seg_selector, void (*isr)(), uint8_t dpl, uint8_t type) {
     uintptr_t offset = (uintptr_t)isr;
-    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl);
+    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl, type);
     _idt[vector] <<= 32;
     _idt[vector] |= (seg_selector << 16) | (offset & 0x0000ffff);
 }
 
+void _set_idt_intr_entry(uint32_t vector, uint16_t seg_selector, void (*isr)(), uint8_t dpl) {
+    _set_idt_entry(vector, seg_selector, isr, dpl, IDT_INTERRUPT);
+}
+
+void _set_idt_trap_entry(uint32_t vector, uint16_t seg_selector, void (*isr)(), uint8_t dpl) {
+    _set_idt_entry(vector, seg_selector, isr, dpl, IDT_TRAP);
+}
+
 
 void
 _init_idt() {
     // CPU defined interrupts
-    _set_idt_entry(FAULT_DIVISION_ERROR, 0x08, _asm_isr0, 0);
-    _set_idt_entry(FAULT_GENERAL_PROTECTION, 0x08, _asm_isr13, 0);
-    _set_idt_entry(FAULT_PAGE_FAULT, 0x08, _asm_isr14, 0);
+    _set_idt_intr_entry(FAULT_DIVISION_ERROR, 0x08, _asm_isr0, 0);
+    _set_idt_intr_entry(FAULT_GENERAL_PROTECTION, 0x08, _asm_isr13, 0);
+    _set_idt_intr_entry(FAULT_PAGE_FAULT, 0x08, _asm_isr14, 0);
 
-    _set_idt_entry(APIC_ERROR_IV, 0x08, _asm_isr200, 0);
-    _set_idt_entry(APIC_LINT0_IV, 0x08, _asm_isr201, 0);
-    _set_idt_entry(APIC_TIMER_IV, 0x08, _asm_isr202, 0);
-    _set_idt_entry(APIC_SPIV_IV,  0x08, _asm_isr203, 0);
+    _set_idt_intr_entry(APIC_ERROR_IV, 0x08, _asm_isr250, 0);
+    _set_idt_intr_entry(APIC_LINT0_IV, 0x08, _asm_isr251, 0);
+    _set_idt_intr_entry(APIC_SPIV_IV,  0x08, _asm_isr252, 0);
+    _set_idt_intr_entry(APIC_TIMER_IV, 0x08, _asm_isr253, 0);
+    _set_idt_intr_entry(PC_KBD_IV,  0x08, _asm_isr201, 0);
 
-    _set_idt_entry(RTC_TIMER_IV,  0x08, _asm_isr210, 0);
+    _set_idt_intr_entry(RTC_TIMER_IV,  0x08, _asm_isr210, 0);
 
     // system defined interrupts
-    _set_idt_entry(LUNAIX_SYS_PANIC, 0x08, _asm_isr32, 0);
+    _set_idt_intr_entry(LUNAIX_SYS_PANIC, 0x08, _asm_isr32, 0);
+
+    // syscall is a trap gate (recall: trap does NOT clear IF flag upon interruption)
+    // XXX: this should be fine, as our design of context switch support interruptible syscall
+    // FIXME: This may cause nasty concurrency bug! We should 'lockify' our code!
+    _set_idt_trap_entry(LUNAIX_SYS_CALL, 0x08, _asm_isr33, 3);
 }
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