#include <hal/io.h>
#include <lunaix/ds/llist.h>
+#include <lunaix/types.h>
#define PCI_CONFIG_ADDR 0xcf8
#define PCI_CONFIG_DATA 0xcfc
// PCI device header format
// Ref: "PCI Local Bus Specification, Rev.3, Section 6.1"
+#define BAR_TYPE_MMIO 0x1
+#define BAR_TYPE_CACHABLE 0x2
+#define PCI_DRV_NAME_LEN 32
+
+struct pci_driver;
+
+struct pci_base_addr
+{
+ uint32_t start;
+ uint32_t size;
+ uint32_t type;
+};
+
struct pci_device
{
struct llist_header dev_chain;
uint32_t cspace_base;
uint32_t msi_loc;
uint16_t intr_info;
+ struct
+ {
+ struct pci_driver* type;
+ void* instance;
+ } driver;
+ struct pci_base_addr bar[6];
+};
+
+typedef void* (*pci_drv_init)(struct pci_device*);
+
+struct pci_driver
+{
+ struct llist_header drivers;
+ u32_t dev_info;
+ u32_t dev_class;
+ pci_drv_init create_driver;
+ char name[PCI_DRV_NAME_LEN];
};
// PCI Configuration Space (C-Space) r/w:
// Refer to "PCI Local Bus Specification, Rev.3, Section 3.2.2.3.2"
-inline pci_reg_t
+static inline pci_reg_t
pci_read_cspace(uint32_t base, int offset)
{
io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
return io_inl(PCI_CONFIG_DATA);
}
-inline void
+static inline void
pci_write_cspace(uint32_t base, int offset, pci_reg_t data)
{
io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
void
pci_init();
-void
-pci_print_device();
-
/**
* @brief 根据类型代码(Class Code)去在拓扑中寻找一个设备
* 类型代码请参阅: PCI LB Spec. Appendix D.
void
pci_setup_msi(struct pci_device* device, int vector);
+void
+pci_add_driver(const char* name,
+ u32_t class,
+ u32_t vendor,
+ u32_t devid,
+ pci_drv_init init);
+
+int
+pci_bind_driver(struct pci_device* pci_dev);
+
#endif /* __LUNAIX_PCI_H */