aa64: finalise context switch, page fault handler and syscall

[lunaix-os.git] / lunaix-os / arch / aarch64 / includes / asm / aa64_mmu.h

diff --git a/lunaix-os/arch/aarch64/includes/asm/aa64_mmu.h b/lunaix-os/arch/aarch64/includes/asm/aa64_mmu.h
index 25885cf09193e1201c291e2624f45ab0b40d929d..5bb176b2b54ed02d7d79ca9de1c3428aba44a10c 100644 (file)
--- a/lunaix-os/arch/aarch64/includes/asm/aa64_mmu.h
+++ b/lunaix-os/arch/aarch64/includes/asm/aa64_mmu.h
@@ -2,6 +2,7 @@
 #define __LUNAIX_AA64_MMU_H
 
 #include "aa64_asm.h"
 #define __LUNAIX_AA64_MMU_H
 
 #include "aa64_asm.h"

+#include <lunaix/bits.h>

 
 #if    defined(CONFIG_AA64_PAGE_GRAN_4K)
 #define _MMU_TG    0b01
 
 #if    defined(CONFIG_AA64_PAGE_GRAN_4K)
 #define _MMU_TG    0b01


@@ -33,7 +34,7 @@
 #define TCR_G16K            (0b10)
 #define TCR_G64K            (0b11)
 
 #define TCR_G16K            (0b10)
 #define TCR_G64K            (0b11)
 

-#define TCR_SHNS            (0b01)
+#define TCR_SHNS            (0b00)

 #define TCR_SHOS            (0b10)
 #define TCR_SHIS            (0b11)
 
 #define TCR_SHOS            (0b10)
 #define TCR_SHIS            (0b11)
 


@@ -47,4 +48,8 @@
 #define TCR_EPD0            (1UL << 7)
 #define TCR_A1              (1UL << 22)
 
 #define TCR_EPD0            (1UL << 7)
 #define TCR_A1              (1UL << 22)
 

+#define TTBR_ASID           BITFIELD(63, 48)
+#define TTBR_BADDR          BITFIELD(47, 1)
+#define TTBR_CnP            BITFLAG(0)
+

 #endif /* __LUNAIX_AA64_MMU_H */
 #endif /* __LUNAIX_AA64_MMU_H */