Merge branch 'master' into isa/arm64

[lunaix-os.git] / lunaix-os / includes / lunaix / compiler.h

diff --git a/lunaix-os/includes/lunaix/compiler.h b/lunaix-os/includes/lunaix/compiler.h
index f011a0b9df07cd865c81ba2c7e741ee87c5598ca..b03b8e86d497ad192a7e89a0631724a3a32503b0 100644 (file)
--- a/lunaix-os/includes/lunaix/compiler.h
+++ b/lunaix-os/includes/lunaix/compiler.h
@@ -1,23 +1,75 @@
 #ifndef __LUNAIX_COMPILER_H
 #define __LUNAIX_COMPILER_H
 
 #ifndef __LUNAIX_COMPILER_H
 #define __LUNAIX_COMPILER_H
 

-#define likely(x) __builtin_expect((x), 1)
-#define unlikely(x) __builtin_expect((x), 0)
+#define likely(x)               __builtin_expect(!!(x), 1)
+#define unlikely(x)             __builtin_expect(!!(x), 0)

 
 

-#define weak_alias(name) __attribute__((weak, alias(name)))
-#define weak __attribute__((weak))
-#define noret __attribute__((noreturn))
+#define __section(name)         __attribute__((section(name)))
+#define weak_alias(name)        __attribute__((weak, alias(name)))
+#define optimize(opt)           __attribute__((optimize(opt)))
+#define _weak                    __attribute__((weak))
+#define noret                   __attribute__((noreturn))
+#define must_inline             __attribute__((always_inline))
+#define must_emit               __attribute__((used))
+#define unreachable             __builtin_unreachable()
+#define no_inline               __attribute__((noinline))
+#define asmlinkage              
+
+#define _be                     __attribute__((scalar_storage_order ("big-endian")))
+#define _le                     __attribute__((scalar_storage_order ("little-endian")))
+
+#define _default                _weak
+
+#define msbiti                  (sizeof(int) * 8 - 1)
+#define clz(bits)               __builtin_clz(bits)
+#define ctz(bits)               __builtin_ctz(bits)
+
+#ifdef CONFIG_ARCH_BITS_64
+#define msbitl                  (sizeof(long) * 8 - 1)
+#define clzl(bits)              __builtin_clzl(bits)
+#define ctzl(bits)              __builtin_ctzl(bits)
+#else
+#define msbitl                  msbiti
+#define clzl(bits)              clz(bits)
+#define ctzl(bits)              ctz(bits)
+#endif
+
+#define sadd_of(a, b, of)       __builtin_sadd_overflow(a, b, of)
+#define saddl_of(a, b, of)      __builtin_saddl_overflow(a, b, of)
+#define umul_of(a, b, of)       __builtin_umul_overflow(a, b, of)
+#define umull_of(a, b, of)      __builtin_umull_overflow(a, b, of)
+#define offsetof(f, m)          __builtin_offsetof(f, m)
+#define select(cond, y, n)      __builtin_choose_expr(cond, y, n)
+#define is_const(v)             __builtin_constant_p(v)
+
+#define prefetch_rd(ptr, ll)    __builtin_prefetch((ptr), 0, ll)
+#define prefetch_wr(ptr, ll)    __builtin_prefetch((ptr), 1, ll)

 
 #define stringify(v) #v
 #define stringify__(v) stringify(v)
 
 
 #define stringify(v) #v
 #define stringify__(v) stringify(v)
 

+#define compact                 __attribute__((packed))
+#define align(v)                __attribute__((aligned (v)))
+
+#define cacheline_size          64
+#define cacheline_align         align(cacheline_size)
+
+#define export_symbol(domain, namespace, symbol)\
+    typeof(symbol)* must_emit __SYMEXPORT_Z##domain##_N##namespace##_S##symbol \
+         = &(symbol)
+

 inline static void noret
 spin()
 {
     volatile int __infloop = 1;
     while (__infloop)
         ;
 inline static void noret
 spin()
 {
     volatile int __infloop = 1;
     while (__infloop)
         ;

-    __builtin_unreachable();
+    unreachable;

 }
 
 }
 

+#ifdef CONFIG_ARCH_X86_32
+#undef  asmlinkage
+#define asmlinkage      __attribute__((regparm(0)))
+#endif
+

 #endif /* __LUNAIX_COMPILER_H */
 #endif /* __LUNAIX_COMPILER_H */