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Unifying External Interrupt System (#51)
[lunaix-os.git]
/
lunaix-os
/
hal
/
ahci
/
ahci.c
diff --git
a/lunaix-os/hal/ahci/ahci.c
b/lunaix-os/hal/ahci/ahci.c
index 3d90845ef795ce8e9f70432a8f0dadea51fc77c3..5ff1cc218afc737ef871f4992b31e46817a8331d 100644
(file)
--- a/
lunaix-os/hal/ahci/ahci.c
+++ b/
lunaix-os/hal/ahci/ahci.c
@@
-14,16
+14,13
@@
#include <hal/ahci/scsi.h>
#include <hal/pci.h>
#include <hal/ahci/scsi.h>
#include <hal/pci.h>
-#include <sys/pci_hba.h>
-#include <sys/port_io.h>
+#include <asm/x86_pmio.h>
#include <klibc/string.h>
#include <lunaix/block.h>
#include <klibc/string.h>
#include <lunaix/block.h>
-#include <lunaix/isrm.h>
#include <lunaix/mm/mmio.h>
#include <lunaix/mm/mmio.h>
-#include <lunaix/mm/pmm.h>
#include <lunaix/mm/valloc.h>
#include <lunaix/mm/valloc.h>
-#include <lunaix/mm/
vmm
.h>
+#include <lunaix/mm/
page
.h>
#include <lunaix/spike.h>
#include <lunaix/syslog.h>
#include <lunaix/spike.h>
#include <lunaix/syslog.h>
@@
-31,13
+28,13
@@
#define HBA_CLB_SIZE 1024
#define HBA_MY_IE (HBA_PxINTR_DHR | HBA_PxINTR_TFE | HBA_PxINTR_OF)
#define HBA_CLB_SIZE 1024
#define HBA_MY_IE (HBA_PxINTR_DHR | HBA_PxINTR_TFE | HBA_PxINTR_OF)
-#define AHCI_DEVCLASS DEVCLASS(
DEVIF_PCI, DEVFN_STORAGE, DEV_
SATA)
+#define AHCI_DEVCLASS DEVCLASS(
LUNAIX, STORAGE,
SATA)
// #define DO_HBA_FULL_RESET
LOG_MODULE("AHCI")
// #define DO_HBA_FULL_RESET
LOG_MODULE("AHCI")
-DEFINE_LLIST(ahcis);
+
static
DEFINE_LLIST(ahcis);
static char sata_ifs[][20] = { "Not detected",
"SATA I (1.5Gbps)",
static char sata_ifs[][20] = { "Not detected",
"SATA I (1.5Gbps)",
@@
-82,10
+79,9
@@
ahci_driver_init(struct ahci_driver_param* param)
{
struct ahci_driver* ahci_drv = vzalloc(sizeof(*ahci_drv));
struct ahci_hba* hba = &ahci_drv->hba;
{
struct ahci_driver* ahci_drv = vzalloc(sizeof(*ahci_drv));
struct ahci_hba* hba = &ahci_drv->hba;
- ahci_drv->id = param->ahci_iv;
-
- isrm_set_payload(param->ahci_iv, (ptr_t)&ahcis);
+ ahci_drv->id = param->irq->vector;
+ irq_set_payload(param->irq, &ahcis);
llist_append(&ahcis, &ahci_drv->ahci_drvs);
hba->base = (hba_reg_t*)ioremap(param->mmio_base, param->mmio_size);
llist_append(&ahcis, &ahci_drv->ahci_drvs);
hba->base = (hba_reg_t*)ioremap(param->mmio_base, param->mmio_size);
@@
-128,16
+124,19
@@
ahci_driver_init(struct ahci_driver_param* param)
__hba_reset_port(port_regs);
#endif
__hba_reset_port(port_regs);
#endif
+ struct leaflet* leaflet;
if (!clbp) {
// 每页最多4个命令队列
if (!clbp) {
// 每页最多4个命令队列
- clb_pa = pmm_alloc_page(KERNEL_PID, PP_FGLOCKED);
- clb_pg_addr = (ptr_t)ioremap(clb_pa, 0x1000);
+ leaflet = alloc_leaflet(0);
+ clb_pa = leaflet_addr(leaflet);
+ clb_pg_addr = vmap(leaflet, KERNEL_DATA);
memset((void*)clb_pg_addr, 0, 0x1000);
}
if (!fisp) {
// 每页最多16个FIS
memset((void*)clb_pg_addr, 0, 0x1000);
}
if (!fisp) {
// 每页最多16个FIS
- fis_pa = pmm_alloc_page(KERNEL_PID, PP_FGLOCKED);
- fis_pg_addr = (ptr_t)ioremap(fis_pa, 0x1000);
+ leaflet = alloc_leaflet(0);
+ fis_pa = leaflet_addr(leaflet);
+ fis_pg_addr = vmap(leaflet, KERNEL_DATA);
memset((void*)fis_pg_addr, 0, 0x1000);
}
memset((void*)fis_pg_addr, 0, 0x1000);
}
@@
-254,6
+253,7
@@
hba_bind_vbuf(struct hba_cmdh* cmdh, struct hba_cmdt* cmdt, struct vecbuf* vbuf)
do {
assert_msg(i < HBA_MAX_PRDTE, "HBA: Too many PRDTEs");
assert_msg(pos->buf.size <= 0x400000U, "HBA: Buffer too big");
do {
assert_msg(i < HBA_MAX_PRDTE, "HBA: Too many PRDTEs");
assert_msg(pos->buf.size <= 0x400000U, "HBA: Buffer too big");
+ assert_msg(pos->buf.size, "HBA: expect a non-zero buffer size");
cmdt->entries[i++] =
(struct hba_prdte){ .data_base = vmm_v2p((ptr_t)pos->buf.buffer),
cmdt->entries[i++] =
(struct hba_prdte){ .data_base = vmm_v2p((ptr_t)pos->buf.buffer),
@@
-409,6
+409,7
@@
int
ahci_identify_device(struct hba_device* device)
{
// 用于重新识别设备(比如在热插拔的情况下)
ahci_identify_device(struct hba_device* device)
{
// 用于重新识别设备(比如在热插拔的情况下)
+ // FIXME this is not right...
vfree(device);
return ahci_init_device(device->port);
}
vfree(device);
return ahci_init_device(device->port);
}