{
#ifdef CONFIG_ARCH_X86_64
asm volatile("1:\n"
+ "subq $8, %1\n"
"rdrand %%rax\n"
- "movq %%rax, (%0)\n"
+ "movq %%rax, (%0, %1, 1)\n"
"addq $8, %%rax\n"
- "subq $8, %1\n"
+ "testq %1, %1\n"
"jnz 1b"
::
"r"((ptr_t)data),
"r"((len & ~0x7))
:
- "%eax");
+ "rax");
#else
asm volatile("1:\n"
+ "subl $4, %1\n"
"rdrand %%eax\n"
- "movl %%eax, (%0)\n"
+ "movl %%eax, (%0, %1, 1)\n"
"addl $4, %%eax\n"
- "subl $4, %1\n"
+ "testl %1, %1\n"
"jnz 1b"
::
"r"((ptr_t)data),
}
int
-pdev_randdev_init(struct device_def* devdef)
+pdev_randdev_create(struct device_def* devdef, morph_t* obj)
{
// FIXME add check on cpuid for presence of rdrand
struct device* devrand = device_allocseq(NULL, NULL);
}
static struct device_def devrandx86_def = {
- .name = "x86 On-Chip RNG",
- .class = DEVCLASS(DEVIF_SOC, DEVFN_CHAR, DEV_RNG),
- .init = pdev_randdev_init};
+ def_device_class(INTEL, CHAR, RNG),
+ def_device_name("x86 On-Chip RNG"),
+ def_on_create(pdev_randdev_create)
+};
EXPORT_DEVICE(randdev, &devrandx86_def, load_onboot);
\ No newline at end of file