#ifndef __LUNAIX_CPU_H
#define __LUNAIX_CPU_H
-#include <stdint.h>
+#include <lunaix/types.h>
#define SEL_RPL(selector) ((selector)&0x3)
static inline reg32
cpu_rcr0()
{
- uintptr_t val;
+ ptr_t val;
asm volatile("movl %%cr0,%0" : "=r"(val));
return val;
}
static inline reg32
cpu_rcr2()
{
- uintptr_t val;
+ ptr_t val;
asm volatile("movl %%cr2,%0" : "=r"(val));
return val;
}
static inline reg32
cpu_rcr3()
{
- uintptr_t val;
+ ptr_t val;
asm volatile("movl %%cr3,%0" : "=r"(val));
return val;
}
+static inline reg32
+cpu_rcr4()
+{
+ ptr_t val;
+ asm volatile("movl %%cr4,%0" : "=r"(val));
+ return val;
+}
+
static inline reg32
cpu_reflags()
{
- uintptr_t val;
+ ptr_t val;
asm volatile("pushf\n"
"popl %0\n"
: "=r"(val)::);
}
static inline void
-cpu_invplg(void* va)
+cpu_invplg(ptr_t va)
{
- asm volatile("invlpg (%0)" ::"r"((uintptr_t)va) : "memory");
+ asm volatile("invlpg (%0)" ::"r"(va) : "memory");
}
static inline void
: "r"(interm));
}
+static inline void
+cpu_int(int vect)
+{
+ asm("int %0" ::"i"(vect));
+}
+
void
-cpu_rdmsr(uint32_t msr_idx, uint32_t* reg_high, uint32_t* reg_low);
+cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low);
void
-cpu_wrmsr(uint32_t msr_idx, uint32_t reg_high, uint32_t reg_low);
+cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low);
+
+static inline void
+cpu_ldvmspace(ptr_t vms)
+{
+ cpu_lcr3(vms);
+}
#endif
\ No newline at end of file