feat: standard vga support (mode switching, framebuffer remapping)

[lunaix-os.git] / lunaix-os / kernel / mm / vmm.c

diff --git a/lunaix-os/kernel/mm/vmm.c b/lunaix-os/kernel/mm/vmm.c
index 55fe52ba22e1509b58997f6d9fa5de6810aa58cb..e21328f6c5f981d597de3371a133cf7b4c15e556 100644 (file)
--- a/lunaix-os/kernel/mm/vmm.c
+++ b/lunaix-os/kernel/mm/vmm.c
@@ -1,10 +1,13 @@
-#include <hal/cpu.h>

 #include <klibc/string.h>
 #include <lunaix/mm/pmm.h>
 #include <lunaix/mm/vmm.h>
 #include <lunaix/spike.h>
 #include <klibc/string.h>
 #include <lunaix/mm/pmm.h>
 #include <lunaix/mm/vmm.h>
 #include <lunaix/spike.h>

+#include <lunaix/syslog.h>

 
 

-#include <stdbool.h>
+#include <sys/cpu.h>
+#include <sys/mm/mempart.h>
+
+LOG_MODULE("VMM")

 
 void
 vmm_init()
 
 void
 vmm_init()


@@ -28,20 +31,22 @@ vmm_init_pd()
 }
 
 int
 }
 
 int

-vmm_set_mapping(uintptr_t mnt, uintptr_t va, uintptr_t pa, pt_attr attr)
+vmm_set_mapping(ptr_t mnt, ptr_t va, ptr_t pa, pt_attr attr, int options)

 {
 {

-    assert((uintptr_t)va % PG_SIZE == 0);
+    assert((ptr_t)va % PG_SIZE == 0);

 
 

-    uintptr_t l1_inx = L1_INDEX(va);
-    uintptr_t l2_inx = L2_INDEX(va);
+    ptr_t l1_inx = L1_INDEX(va);
+    ptr_t l2_inx = L2_INDEX(va);

     x86_page_table* l1pt = (x86_page_table*)(mnt | (1023 << 12));
     x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_inx << 12));
 
     // See if attr make sense
     assert(attr <= 128);
 
     x86_page_table* l1pt = (x86_page_table*)(mnt | (1023 << 12));
     x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_inx << 12));
 
     // See if attr make sense
     assert(attr <= 128);
 

-    if (!l1pt->entry[l1_inx]) {
-        x86_page_table* new_l1pt_pa = pmm_alloc_page(KERNEL_PID, PP_FGPERSIST);
+    x86_pte_t* l1pte = &l1pt->entry[l1_inx];
+    if (!*l1pte) {
+        x86_page_table* new_l1pt_pa =
+          (x86_page_table*)pmm_alloc_page(KERNEL_PID, PP_FGPERSIST);

 
         // 物理内存已满！
         if (!new_l1pt_pa) {
 
         // 物理内存已满！
         if (!new_l1pt_pa) {


@@ -49,25 +54,42 @@ vmm_set_mapping(uintptr_t mnt, uintptr_t va, uintptr_t pa, pt_attr attr)
         }
 
         // This must be writable
         }
 
         // This must be writable

-        l1pt->entry[l1_inx] = NEW_L1_ENTRY(attr | PG_WRITE, new_l1pt_pa);
+        *l1pte = NEW_L1_ENTRY(attr | PG_WRITE | PG_PRESENT, new_l1pt_pa);
+
+        // make sure our new l2 table is visible to CPU
+        cpu_flush_page((ptr_t)l2pt);
+

         memset((void*)l2pt, 0, PG_SIZE);
         memset((void*)l2pt, 0, PG_SIZE);

+    } else {
+        if ((attr & PG_ALLOW_USER) && !(*l1pte & PG_ALLOW_USER)) {
+            *l1pte |= PG_ALLOW_USER;
+        }
+
+        x86_pte_t pte = l2pt->entry[l2_inx];
+        if (pte && (options & VMAP_IGNORE)) {
+            return 1;
+        }

     }
 
     }
 

-    if (mnt == PD_REFERENCED) {
-        cpu_invplg(va);
+    if (mnt == VMS_SELF) {
+        cpu_flush_page(va);
+    }
+
+    if ((options & VMAP_NOMAP)) {
+        return 1;

     }
 
     l2pt->entry[l2_inx] = NEW_L2_ENTRY(attr, pa);
     return 1;
 }
 
     }
 
     l2pt->entry[l2_inx] = NEW_L2_ENTRY(attr, pa);
     return 1;
 }
 

-int
-vmm_del_mapping(uintptr_t mnt, uintptr_t va)
+ptr_t
+vmm_del_mapping(ptr_t mnt, ptr_t va)

 {
 {

-    assert(((uintptr_t)va & 0xFFFU) == 0);
+    assert(((ptr_t)va & 0xFFFU) == 0);

 
 

-    uint32_t l1_index = L1_INDEX(va);
-    uint32_t l2_index = L2_INDEX(va);
+    u32_t l1_index = L1_INDEX(va);
+    u32_t l2_index = L2_INDEX(va);

 
     // prevent unmap of recursive mapping region
     if (l1_index == 1023) {
 
     // prevent unmap of recursive mapping region
     if (l1_index == 1023) {


@@ -82,25 +104,34 @@ vmm_del_mapping(uintptr_t mnt, uintptr_t va)
         x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_index << 12));
         x86_pte_t l2pte = l2pt->entry[l2_index];
 
         x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_index << 12));
         x86_pte_t l2pte = l2pt->entry[l2_index];
 

-        cpu_invplg(va);
+        cpu_flush_page(va);

         l2pt->entry[l2_index] = PTE_NULL;
         l2pt->entry[l2_index] = PTE_NULL;

+
+        return PG_ENTRY_ADDR(l2pte);

     }
     }

+
+    return 0;

 }
 
 int
 }
 
 int

-vmm_lookup(uintptr_t va, v_mapping* mapping)
+vmm_lookup(ptr_t va, v_mapping* mapping)

 {
 {

-    // va = va & ~0xfff;
+    return vmm_lookupat(VMS_SELF, va, mapping);
+}

 
 

-    uint32_t l1_index = L1_INDEX(va);
-    uint32_t l2_index = L2_INDEX(va);
+int
+vmm_lookupat(ptr_t mnt, ptr_t va, v_mapping* mapping)
+{
+    u32_t l1_index = L1_INDEX(va);
+    u32_t l2_index = L2_INDEX(va);

 
 

-    x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
+    x86_page_table* l1pt = (x86_page_table*)(mnt | 1023 << 12);

     x86_pte_t l1pte = l1pt->entry[l1_index];
 
     if (l1pte) {
         x86_pte_t* l2pte =
     x86_pte_t l1pte = l1pt->entry[l1_index];
 
     if (l1pte) {
         x86_pte_t* l2pte =

-          &((x86_page_table*)L2_VADDR(l1_index))->entry[l2_index];
+          &((x86_page_table*)(mnt | (l1_index << 12)))->entry[l2_index];
+

         if (l2pte) {
             mapping->flags = PG_ENTRY_FLAGS(*l2pte);
             mapping->pa = PG_ENTRY_ADDR(*l2pte);
         if (l2pte) {
             mapping->flags = PG_ENTRY_FLAGS(*l2pte);
             mapping->pa = PG_ENTRY_ADDR(*l2pte);


@@ -110,22 +141,84 @@ vmm_lookup(uintptr_t va, v_mapping* mapping)
             return 1;
         }
     }
             return 1;
         }
     }

+

     return 0;
 }
 
     return 0;
 }
 

-void*
-vmm_mount_pd(uintptr_t mnt, void* pde)
+ptr_t
+vmm_v2p(ptr_t va)
+{
+    u32_t l1_index = L1_INDEX(va);
+    u32_t l2_index = L2_INDEX(va);
+
+    x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
+    x86_pte_t l1pte = l1pt->entry[l1_index];
+
+    if (l1pte) {
+        x86_pte_t* l2pte =
+          &((x86_page_table*)L2_VADDR(l1_index))->entry[l2_index];
+
+        if (l2pte) {
+            return PG_ENTRY_ADDR(*l2pte) | ((ptr_t)va & 0xfff);
+        }
+    }
+    return 0;
+}
+
+ptr_t
+vmm_v2pat(ptr_t mnt, ptr_t va)
+{
+    u32_t l1_index = L1_INDEX(va);
+    u32_t l2_index = L2_INDEX(va);
+
+    x86_page_table* l1pt = (x86_page_table*)(mnt | 1023 << 12);
+    x86_pte_t l1pte = l1pt->entry[l1_index];
+
+    if (l1pte) {
+        x86_pte_t* l2pte =
+          &((x86_page_table*)(mnt | (l1_index << 12)))->entry[l2_index];
+
+        if (l2pte) {
+            return PG_ENTRY_ADDR(*l2pte) | ((ptr_t)va & 0xfff);
+        }
+    }
+    return 0;
+}
+
+ptr_t
+vmm_mount_pd(ptr_t mnt, ptr_t pde)

 {
     x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
     l1pt->entry[(mnt >> 22)] = NEW_L1_ENTRY(T_SELF_REF_PERM, pde);
 {
     x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
     l1pt->entry[(mnt >> 22)] = NEW_L1_ENTRY(T_SELF_REF_PERM, pde);

-    cpu_invplg(mnt);
+    cpu_flush_page(mnt);

     return mnt;
 }
 
     return mnt;
 }
 

-void*
-vmm_unmount_pd(uintptr_t mnt)
+ptr_t
+vmm_unmount_pd(ptr_t mnt)

 {
     x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
     l1pt->entry[(mnt >> 22)] = 0;
 {
     x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
     l1pt->entry[(mnt >> 22)] = 0;

-    cpu_invplg(mnt);
+    cpu_flush_page(mnt);
+    return mnt;
+}
+
+ptr_t
+vmm_dup_page(pid_t pid, ptr_t pa)
+{
+    ptr_t new_ppg = pmm_alloc_page(pid, 0);
+    vmm_set_mapping(VMS_SELF, PG_MOUNT_3, new_ppg, PG_PREM_RW, VMAP_NULL);
+    vmm_set_mapping(VMS_SELF, PG_MOUNT_4, pa, PG_PREM_RW, VMAP_NULL);
+
+    asm volatile("movl %1, %%edi\n"
+                 "movl %2, %%esi\n"
+                 "rep movsl\n" ::"c"(1024),
+                 "r"(PG_MOUNT_3),
+                 "r"(PG_MOUNT_4)
+                 : "memory", "%edi", "%esi");
+
+    vmm_del_mapping(VMS_SELF, PG_MOUNT_3);
+    vmm_del_mapping(VMS_SELF, PG_MOUNT_4);
+
+    return new_ppg;

 }
\ No newline at end of file
 }
\ No newline at end of file