}
/**
- * @brief Flush TLB
+ * @brief Flush a certain TLB record
*
* @return u32_t
*/
asm volatile("invlpg (%0)" ::"r"(va) : "memory");
}
+/**
+ * @brief Flush entire TLB
+ *
+ */
static inline void
cpu_flush_vmspace()
{
asm("hlt");
}
+/**
+ * @brief Read exeception address
+ *
+ * @return ptr_t
+ */
static inline ptr_t
cpu_ldeaddr()
{