-#include <hal/acpi/acpi.h>
-#include <hal/ioapic.h>
-
-#include <lunaix/isrm.h>
+#include <lunaix/generic/isrm.h>
#include <lunaix/spike.h>
+#include <lunaix/owloysius.h>
+
+#include "sys/x86_isa.h"
+#include "sys/ioapic.h"
+#include "sys/apic.h"
/*
total: 256 ivs
48~ : free to allocate for external hardware use. (x208)
*/
-static char iv_bmp[(IV_MAX - IV_BASE) / 8];
-static isr_cb handlers[IV_MAX];
+static char iv_bmp[(IV_EX_END - IV_BASE_END) / 8];
+static isr_cb handlers[TOTAL_IV];
+static ptr_t ivhand_payload[TOTAL_IV];
+
+static struct x86_intc arch_intc_ctx;
extern void
-intr_routine_fallback(const isr_param* param);
+intr_routine_fallback(const struct hart_state* state);
void
isrm_init()
{
- for (size_t i = 0; i < 256; i++) {
+ for (size_t i = 0; i < TOTAL_IV; i++) {
handlers[i] = intr_routine_fallback;
}
}
static inline int
__ivalloc_within(size_t a, size_t b, isr_cb handler)
{
- a = (a - IV_BASE) / 8;
- b = (b - IV_BASE) / 8;
+ a = (a - IV_BASE_END);
+ b = (b - IV_BASE_END);
+ u8_t j = a % 8;
+ u8_t k = 0;
- for (size_t i = a; i < b; i++) {
- u8_t chunk = iv_bmp[i], j = 0;
+ for (size_t i = a / 8; i < b / 8; i++, k += 8) {
+ u8_t chunk = iv_bmp[i];
if (chunk == 0xff)
continue;
- while ((chunk & 0x1)) {
+ chunk >>= j;
+ while ((chunk & 0x1) && k <= b) {
chunk >>= 1;
j++;
+ k++;
+ }
+
+ if (k > b) {
+ break;
}
iv_bmp[i] |= 1 << j;
- int iv = IV_BASE + i * 8 + j;
+ int iv = IV_BASE_END + i * 8 + j;
handlers[iv] = handler ? handler : intr_routine_fallback;
return iv;
int
isrm_ivosalloc(isr_cb handler)
{
- return __ivalloc_within(IV_BASE, IV_EX, handler);
+ return __ivalloc_within(IV_BASE_END, IV_EX_BEGIN, handler);
}
int
isrm_ivexalloc(isr_cb handler)
{
- return __ivalloc_within(IV_EX, IV_MAX, handler);
+ return __ivalloc_within(IV_EX_BEGIN, IV_EX_END, handler);
}
void
{
assert(iv < 256);
- if (iv >= IV_BASE) {
- iv_bmp[(iv - IV_BASE) / 8] &= ~(1 << ((iv - IV_BASE) % 8));
+ if (iv >= IV_BASE_END) {
+ iv_bmp[(iv - IV_BASE_END) / 8] &= ~(1 << ((iv - IV_BASE_END) % 8));
}
handlers[iv] = intr_routine_fallback;
{
int iv;
if (!(iv = isrm_ivexalloc(irq_handler))) {
- panickf("out of IV resource. (irq=%d)", irq);
+ fail("out of IV resource.");
return 0; // never reach
}
- // PC_AT_IRQ_RTC -> RTC_TIMER_IV, fixed, edge trigged, polarity=high,
- // physical, APIC ID 0
- ioapic_redirect(acpi_gistranslate(irq), iv, 0, IOAPIC_DELMOD_FIXED);
+ // fixed, edge trigged, polarity=high
+ isrm_irq_attach(irq, iv, 0, IRQ_DEFAULT);
return iv;
}
{
assert(iv < 256);
- if (iv >= IV_BASE) {
- iv_bmp[(iv - IV_BASE) / 8] |= 1 << ((iv - IV_BASE) % 8);
+ if (iv >= IV_BASE_END) {
+ iv_bmp[(iv - IV_BASE_END) / 8] |= 1 << ((iv - IV_BASE_END) % 8);
}
handlers[iv] = handler;
assert(iv < 256);
return handlers[iv];
-}
\ No newline at end of file
+}
+
+ptr_t
+isrm_get_payload(const struct hart_state* state)
+{
+ int iv = state->execp->vector;
+ assert(iv < 256);
+
+ return ivhand_payload[iv];
+}
+
+void
+isrm_set_payload(int iv, ptr_t payload)
+{
+ assert(iv < 256);
+
+ ivhand_payload[iv] = payload;
+}
+
+void
+isrm_irq_attach(int irq, int iv, cpu_t dest, u32_t flags)
+{
+ arch_intc_ctx.irq_attach(&arch_intc_ctx, irq, iv, dest, flags);
+}
+
+void
+isrm_notify_eoi(cpu_t id, int iv)
+{
+ arch_intc_ctx.notify_eoi(&arch_intc_ctx, id, iv);
+}
+
+void
+isrm_notify_eos(cpu_t id)
+{
+ isrm_notify_eoi(id, LUNAIX_SCHED);
+}
+
+
+static void
+__intc_init()
+{
+ apic_init();
+ ioapic_init();
+
+ arch_intc_ctx.name = "i386_apic";
+ arch_intc_ctx.irq_attach = ioapic_irq_remap;
+ arch_intc_ctx.notify_eoi = apic_on_eoi;
+}
+owloysius_fetch_init(__intc_init, on_earlyboot);
\ No newline at end of file