refactor: Optimize the context switch overhead

[lunaix-os.git] / lunaix-os / includes / hal / cpu.h

diff --git a/lunaix-os/includes/hal/cpu.h b/lunaix-os/includes/hal/cpu.h
index fe633d090fa7f3c7a189d590e9c8655c691ba752..3b77c7eb12aeca27205d8406f738ae5c8a17f0c2 100644 (file)
--- a/lunaix-os/includes/hal/cpu.h
+++ b/lunaix-os/includes/hal/cpu.h
@@ -1,7 +1,9 @@
 #ifndef __LUNAIX_CPU_H
 #define __LUNAIX_CPU_H
 
 #ifndef __LUNAIX_CPU_H
 #define __LUNAIX_CPU_H
 

-#include <stdint.h>
+#include <lunaix/types.h>
+
+#define SEL_RPL(selector) ((selector)&0x3)

 
 typedef unsigned int reg32;
 typedef unsigned short reg16;
 
 typedef unsigned int reg32;
 typedef unsigned short reg16;


@@ -37,7 +39,7 @@ cpu_has_apic();
 static inline reg32
 cpu_rcr0()
 {
 static inline reg32
 cpu_rcr0()
 {

-    uintptr_t val;
+    ptr_t val;

     asm volatile("movl %%cr0,%0" : "=r"(val));
     return val;
 }
     asm volatile("movl %%cr0,%0" : "=r"(val));
     return val;
 }


@@ -45,7 +47,7 @@ cpu_rcr0()
 static inline reg32
 cpu_rcr2()
 {
 static inline reg32
 cpu_rcr2()
 {

-    uintptr_t val;
+    ptr_t val;

     asm volatile("movl %%cr2,%0" : "=r"(val));
     return val;
 }
     asm volatile("movl %%cr2,%0" : "=r"(val));
     return val;
 }


@@ -53,15 +55,23 @@ cpu_rcr2()
 static inline reg32
 cpu_rcr3()
 {
 static inline reg32
 cpu_rcr3()
 {

-    uintptr_t val;
+    ptr_t val;

     asm volatile("movl %%cr3,%0" : "=r"(val));
     return val;
 }
 
     asm volatile("movl %%cr3,%0" : "=r"(val));
     return val;
 }
 

+static inline reg32
+cpu_rcr4()
+{
+    ptr_t val;
+    asm volatile("movl %%cr4,%0" : "=r"(val));
+    return val;
+}
+

 static inline reg32
 cpu_reflags()
 {
 static inline reg32
 cpu_reflags()
 {

-    uintptr_t val;
+    ptr_t val;

     asm volatile("pushf\n"
                  "popl %0\n"
                  : "=r"(val)::);
     asm volatile("pushf\n"
                  "popl %0\n"
                  : "=r"(val)::);


@@ -88,9 +98,9 @@ cpu_lcr3(reg32 v)
 }
 
 static inline void
 }
 
 static inline void

-cpu_invplg(void* va)
+cpu_invplg(ptr_t va)

 {
 {

-    asm volatile("invlpg (%0)" ::"r"((uintptr_t)va) : "memory");
+    asm volatile("invlpg (%0)" ::"r"(va) : "memory");

 }
 
 static inline void
 }
 
 static inline void


@@ -115,10 +125,22 @@ cpu_invtlb()
         : "r"(interm));
 }
 
         : "r"(interm));
 }
 

+static inline void
+cpu_int(int vect)
+{
+    asm("int %0" ::"i"(vect));
+}
+

 void
 void

-cpu_rdmsr(uint32_t msr_idx, uint32_t* reg_high, uint32_t* reg_low);
+cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low);

 
 void
 
 void

-cpu_wrmsr(uint32_t msr_idx, uint32_t reg_high, uint32_t reg_low);
+cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low);
+
+static inline void
+cpu_ldvmspace(ptr_t vms)
+{
+    cpu_lcr3(vms);
+}

 
 #endif
\ No newline at end of file
 
 #endif
\ No newline at end of file