Support to multi-threading and pthread interface (POSIX.1-2008) (#23)

[lunaix-os.git] / lunaix-os / kernel / mm / vmm.c

diff --git a/lunaix-os/kernel/mm/vmm.c b/lunaix-os/kernel/mm/vmm.c
index 8f67bd2d8237ad53d80a5ddd48f98f4b38e762b1..5e09e9dada4d5e92e4e48c7bb4c2f2c632de02bf 100644 (file)
--- a/lunaix-os/kernel/mm/vmm.c
+++ b/lunaix-os/kernel/mm/vmm.c
@@ -1,10 +1,12 @@
-#include <hal/cpu.h>
 #include <klibc/string.h>
 #include <lunaix/mm/pmm.h>
 #include <lunaix/mm/vmm.h>
 #include <lunaix/spike.h>
 #include <lunaix/syslog.h>
 
+#include <sys/cpu.h>
+#include <sys/mm/mm_defs.h>
+
 LOG_MODULE("VMM")
 
 void
@@ -17,7 +19,7 @@ x86_page_table*
 vmm_init_pd()
 {
     x86_page_table* dir =
-      (x86_page_table*)pmm_alloc_page(KERNEL_PID, PP_FGPERSIST);
+      (x86_page_table*)pmm_alloc_page(PP_FGPERSIST);
     for (size_t i = 0; i < PG_MAX_ENTRIES; i++) {
         dir->entry[i] = PTE_NULL;
     }
@@ -29,24 +31,22 @@ vmm_init_pd()
 }
 
 int
-vmm_set_mapping(uintptr_t mnt,
-                uintptr_t va,
-                uintptr_t pa,
-                pt_attr attr,
-                int options)
+vmm_set_mapping(ptr_t mnt, ptr_t va, ptr_t pa, pt_attr attr, int options)
 {
-    assert((uintptr_t)va % PG_SIZE == 0);
+    assert((ptr_t)va % PG_SIZE == 0);
 
-    uintptr_t l1_inx = L1_INDEX(va);
-    uintptr_t l2_inx = L2_INDEX(va);
+    ptr_t l1_inx = L1_INDEX(va);
+    ptr_t l2_inx = L2_INDEX(va);
     x86_page_table* l1pt = (x86_page_table*)(mnt | (1023 << 12));
     x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_inx << 12));
 
     // See if attr make sense
     assert(attr <= 128);
 
-    if (!l1pt->entry[l1_inx]) {
-        x86_page_table* new_l1pt_pa = pmm_alloc_page(KERNEL_PID, PP_FGPERSIST);
+    x86_pte_t* l1pte = &l1pt->entry[l1_inx];
+    if (!*l1pte) {
+        x86_page_table* new_l1pt_pa =
+          (x86_page_table*)pmm_alloc_page(PP_FGPERSIST);
 
         // 物理内存已满！
         if (!new_l1pt_pa) {
@@ -54,14 +54,17 @@ vmm_set_mapping(uintptr_t mnt,
         }
 
         // This must be writable
-        l1pt->entry[l1_inx] =
-          NEW_L1_ENTRY(attr | PG_WRITE | PG_PRESENT, new_l1pt_pa);
+        *l1pte = NEW_L1_ENTRY(attr | PG_WRITE | PG_PRESENT, new_l1pt_pa);
 
         // make sure our new l2 table is visible to CPU
-        cpu_invplg(l2pt);
+        cpu_flush_page((ptr_t)l2pt);
 
         memset((void*)l2pt, 0, PG_SIZE);
     } else {
+        if ((attr & PG_ALLOW_USER) && !(*l1pte & PG_ALLOW_USER)) {
+            *l1pte |= PG_ALLOW_USER;
+        }
+
         x86_pte_t pte = l2pt->entry[l2_inx];
         if (pte && (options & VMAP_IGNORE)) {
             return 1;
@@ -69,21 +72,26 @@ vmm_set_mapping(uintptr_t mnt,
     }
 
     if (mnt == VMS_SELF) {
-        cpu_invplg(va);
+        cpu_flush_page(va);
     }
 
     if ((options & VMAP_NOMAP)) {
         return 1;
     }
 
-    l2pt->entry[l2_inx] = NEW_L2_ENTRY(attr, pa);
+    if (!(options & VMAP_GUARDPAGE)) {
+        l2pt->entry[l2_inx] = NEW_L2_ENTRY(attr, pa);
+    } else {
+        l2pt->entry[l2_inx] = MEMGUARD;
+    }
+    
     return 1;
 }
 
-uintptr_t
-vmm_del_mapping(uintptr_t mnt, uintptr_t va)
+ptr_t
+vmm_del_mapping(ptr_t mnt, ptr_t va)
 {
-    assert(((uintptr_t)va & 0xFFFU) == 0);
+    assert(((ptr_t)va & 0xFFFU) == 0);
 
     u32_t l1_index = L1_INDEX(va);
     u32_t l2_index = L2_INDEX(va);
@@ -101,7 +109,7 @@ vmm_del_mapping(uintptr_t mnt, uintptr_t va)
         x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_index << 12));
         x86_pte_t l2pte = l2pt->entry[l2_index];
 
-        cpu_invplg(va);
+        cpu_flush_page(va);
         l2pt->entry[l2_index] = PTE_NULL;
 
         return PG_ENTRY_ADDR(l2pte);
@@ -111,13 +119,13 @@ vmm_del_mapping(uintptr_t mnt, uintptr_t va)
 }
 
 int
-vmm_lookup(uintptr_t va, v_mapping* mapping)
+vmm_lookup(ptr_t va, v_mapping* mapping)
 {
     return vmm_lookupat(VMS_SELF, va, mapping);
 }
 
 int
-vmm_lookupat(ptr_t mnt, uintptr_t va, v_mapping* mapping)
+vmm_lookupat(ptr_t mnt, ptr_t va, v_mapping* mapping)
 {
     u32_t l1_index = L1_INDEX(va);
     u32_t l2_index = L2_INDEX(va);
@@ -128,6 +136,7 @@ vmm_lookupat(ptr_t mnt, uintptr_t va, v_mapping* mapping)
     if (l1pte) {
         x86_pte_t* l2pte =
           &((x86_page_table*)(mnt | (l1_index << 12)))->entry[l2_index];
+
         if (l2pte) {
             mapping->flags = PG_ENTRY_FLAGS(*l2pte);
             mapping->pa = PG_ENTRY_ADDR(*l2pte);
@@ -137,11 +146,12 @@ vmm_lookupat(ptr_t mnt, uintptr_t va, v_mapping* mapping)
             return 1;
         }
     }
+
     return 0;
 }
 
-void*
-vmm_v2p(void* va)
+ptr_t
+vmm_v2p(ptr_t va)
 {
     u32_t l1_index = L1_INDEX(va);
     u32_t l2_index = L2_INDEX(va);
@@ -152,15 +162,16 @@ vmm_v2p(void* va)
     if (l1pte) {
         x86_pte_t* l2pte =
           &((x86_page_table*)L2_VADDR(l1_index))->entry[l2_index];
+
         if (l2pte) {
-            return PG_ENTRY_ADDR(*l2pte) | ((uintptr_t)va & 0xfff);
+            return PG_ENTRY_ADDR(*l2pte) | ((ptr_t)va & 0xfff);
         }
     }
     return 0;
 }
 
-void*
-vmm_v2pat(ptr_t mnt, void* va)
+ptr_t
+vmm_v2pat(ptr_t mnt, ptr_t va)
 {
     u32_t l1_index = L1_INDEX(va);
     u32_t l2_index = L2_INDEX(va);
@@ -171,26 +182,50 @@ vmm_v2pat(ptr_t mnt, void* va)
     if (l1pte) {
         x86_pte_t* l2pte =
           &((x86_page_table*)(mnt | (l1_index << 12)))->entry[l2_index];
+
         if (l2pte) {
-            return PG_ENTRY_ADDR(*l2pte) | ((uintptr_t)va & 0xfff);
+            return PG_ENTRY_ADDR(*l2pte) | ((ptr_t)va & 0xfff);
         }
     }
     return 0;
 }
 
-void*
-vmm_mount_pd(uintptr_t mnt, void* pde)
+ptr_t
+vmm_mount_pd(ptr_t mnt, ptr_t pde)
 {
+    assert(pde);
+
     x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
     l1pt->entry[(mnt >> 22)] = NEW_L1_ENTRY(T_SELF_REF_PERM, pde);
-    cpu_invplg(mnt);
+    cpu_flush_page(mnt);
     return mnt;
 }
 
-void*
-vmm_unmount_pd(uintptr_t mnt)
+ptr_t
+vmm_unmount_pd(ptr_t mnt)
 {
     x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
     l1pt->entry[(mnt >> 22)] = 0;
-    cpu_invplg(mnt);
+    cpu_flush_page(mnt);
+    return mnt;
+}
+
+ptr_t
+vmm_dup_page(ptr_t pa)
+{
+    ptr_t new_ppg = pmm_alloc_page(0);
+    vmm_set_mapping(VMS_SELF, PG_MOUNT_3, new_ppg, PG_PREM_RW, VMAP_NULL);
+    vmm_set_mapping(VMS_SELF, PG_MOUNT_4, pa, PG_PREM_RW, VMAP_NULL);
+
+    asm volatile("movl %1, %%edi\n"
+                 "movl %2, %%esi\n"
+                 "rep movsl\n" ::"c"(1024),
+                 "r"(PG_MOUNT_3),
+                 "r"(PG_MOUNT_4)
+                 : "memory", "%edi", "%esi");
+
+    vmm_del_mapping(VMS_SELF, PG_MOUNT_3);
+    vmm_del_mapping(VMS_SELF, PG_MOUNT_4);
+
+    return new_ppg;
 }
\ No newline at end of file