Architectural Support: x86_64 (#37)

[lunaix-os.git] / lunaix-os / hal / char / uart / 16550.h

diff --git a/lunaix-os/hal/char/uart/16550.h b/lunaix-os/hal/char/uart/16550.h
index 1b903a735374776c8ab468ff31388a0408bdd3fc..5b4040b695a152fdcb001fad89930ff54103dd59 100644 (file)
--- a/lunaix-os/hal/char/uart/16550.h
+++ b/lunaix-os/hal/char/uart/16550.h
@@ -17,7 +17,6 @@
 #define UART_rDLM 1
 
 #define UART_INTRX 0x1
-#define UART_DLAB (1 << 7)
 #define UART_LOOP (1 << 4)
 
 #define UART_rIE_ERBFI 1
@@ -25,6 +24,12 @@
 #define UART_rIE_ELSI (1 << 2)
 #define UART_rIE_EDSSI (1 << 3)
 
+#define UART_rLC_STOPB (1 << 2)
+#define UART_rLC_PAREN (1 << 3)
+#define UART_rLC_PAREVN (1 << 4)
+#define UART_rLC_SETBRK (1 << 6)
+#define UART_rLC_DLAB (1 << 7)
+
 #define UART_rLS_THRE (1 << 5)
 #define UART_rLS_DR 1
 #define UART_rLS_BI (1 << 4)
@@ -65,6 +70,7 @@ struct uart16550
         u8_t rie;
         u8_t rfc;
         u8_t rmc;
+        u8_t rlc;
     } cntl_save;
 
     u32_t (*read_reg)(struct uart16550* uart, ptr_t regoff);
@@ -90,7 +96,13 @@ uart_clrie(struct uart16550* uart)
 static inline void
 uart_setie(struct uart16550* uart)
 {
-    uart->write_reg(uart, UART_rIE, uart->cntl_save.rie | 1);
+    uart->write_reg(uart, UART_rIE, uart->cntl_save.rie);
+}
+
+static inline void
+uart_setlc(struct uart16550* uart)
+{
+    uart->write_reg(uart, UART_rLC, uart->cntl_save.rlc);
 }
 
 struct uart16550*
@@ -104,13 +116,13 @@ uart_baud_divisor(struct uart16550* uart, int div)
 {
     u32_t rlc = uart->read_reg(uart, UART_rLC);
 
-    uart->write_reg(uart, UART_rLC, UART_DLAB | rlc);
+    uart->write_reg(uart, UART_rLC, UART_rLC_DLAB | rlc);
     u8_t ls = (div & 0xff), ms = (div & 0xff00) >> 8;
 
     uart->write_reg(uart, UART_rLS, ls);
     uart->write_reg(uart, UART_rMS, ms);
 
-    uart->write_reg(uart, UART_rLC, rlc & ~UART_DLAB);
+    uart->write_reg(uart, UART_rLC, rlc & ~UART_rLC_DLAB);
 
     return 0;
 }