feat: (vm) memory mapping support: mmap/munmap

[lunaix-os.git] / lunaix-os / kernel / asm / x86 / intr_routines.c

diff --git a/lunaix-os/kernel/asm/x86/intr_routines.c b/lunaix-os/kernel/asm/x86/intr_routines.c
index 8cc3ff558d3c338c7bf6a05ae4d46ae971774e89..97903cffebfdc5c1e3e145485e71825605527e90 100644 (file)
--- a/lunaix-os/kernel/asm/x86/intr_routines.c
+++ b/lunaix-os/kernel/asm/x86/intr_routines.c
@@ -1,5 +1,9 @@
 #include <arch/x86/interrupts.h>
+
+#include <lunaix/isrm.h>
+#include <lunaix/lxconsole.h>
 #include <lunaix/process.h>
+#include <lunaix/sched.h>
 #include <lunaix/spike.h>
 #include <lunaix/syslog.h>
 #include <lunaix/tty/tty.h>
@@ -13,7 +17,7 @@ LOG_MODULE("INTR")
 extern void
 intr_routine_page_fault(const isr_param* param);
 
-extern uint32_t debug_resv;
+extern u32_t debug_resv;
 
 void
 __print_panic_msg(const char* msg, const isr_param* param)
@@ -29,6 +33,7 @@ __print_panic_msg(const char* msg, const isr_param* param)
 void
 intr_routine_divide_zero(const isr_param* param)
 {
+    console_flush();
     __print_panic_msg("Divide by zero!", param);
     spin();
 }
@@ -36,8 +41,10 @@ intr_routine_divide_zero(const isr_param* param)
 void
 intr_routine_general_protection(const isr_param* param)
 {
+    kprintf(KERROR "Pid: %d\n", __current->pid);
     kprintf(KERROR "Addr: %p\n", (&debug_resv)[0]);
-    kprintf(KERROR "Expected: %p\n", __current->intr_ctx.eip);
+    kprintf(KERROR "Expected: %p\n", (&debug_resv)[1]);
+    console_flush();
     __print_panic_msg("General Protection", param);
     spin();
 }
@@ -45,6 +52,7 @@ intr_routine_general_protection(const isr_param* param)
 void
 intr_routine_sys_panic(const isr_param* param)
 {
+    console_flush();
     __print_panic_msg((char*)(param->registers.edi), param);
     spin();
 }
@@ -52,6 +60,7 @@ intr_routine_sys_panic(const isr_param* param)
 void
 intr_routine_fallback(const isr_param* param)
 {
+    console_flush();
     __print_panic_msg("Unknown Interrupt", param);
     spin();
 }
@@ -70,23 +79,31 @@ intr_routine_apic_spi(const isr_param* param)
 void
 intr_routine_apic_error(const isr_param* param)
 {
-    uint32_t error_reg = apic_read_reg(APIC_ESR);
+    u32_t error_reg = apic_read_reg(APIC_ESR);
     char buf[32];
-    sprintf(buf, "APIC error, ESR=0x%x", error_reg);
+    ksprintf(buf, "APIC error, ESR=0x%x", error_reg);
+    console_flush();
     __print_panic_msg(buf, param);
     spin();
 }
 
+void
+intr_routine_sched(const isr_param* param)
+{
+    schedule();
+}
+
 void
 intr_routine_init()
 {
-    intr_subscribe(FAULT_DIVISION_ERROR, intr_routine_divide_zero);
-    intr_subscribe(FAULT_GENERAL_PROTECTION, intr_routine_general_protection);
-    intr_subscribe(FAULT_PAGE_FAULT, intr_routine_page_fault);
-    intr_subscribe(FAULT_STACK_SEG_FAULT, intr_routine_page_fault);
-    intr_subscribe(LUNAIX_SYS_PANIC, intr_routine_sys_panic);
-    intr_subscribe(APIC_SPIV_IV, intr_routine_apic_spi);
-    intr_subscribe(APIC_ERROR_IV, intr_routine_apic_error);
-
-    intr_set_fallback_handler(intr_routine_fallback);
+    isrm_bindiv(FAULT_DIVISION_ERROR, intr_routine_divide_zero);
+    isrm_bindiv(FAULT_GENERAL_PROTECTION, intr_routine_general_protection);
+    isrm_bindiv(FAULT_PAGE_FAULT, intr_routine_page_fault);
+    isrm_bindiv(FAULT_STACK_SEG_FAULT, intr_routine_page_fault);
+
+    isrm_bindiv(LUNAIX_SYS_PANIC, intr_routine_sys_panic);
+    isrm_bindiv(LUNAIX_SCHED, intr_routine_sched);
+
+    isrm_bindiv(APIC_SPIV_IV, intr_routine_apic_spi);
+    isrm_bindiv(APIC_ERROR_IV, intr_routine_apic_error);
 }
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