refactor: keep in mind the stack layout is crucial. Move context switching & signal...

[lunaix-os.git] / lunaix-os / kernel / asm / x86 / idt.c

diff --git a/lunaix-os/kernel/asm/x86/idt.c b/lunaix-os/kernel/asm/x86/idt.c
index 19b63e0d2ad788589c2fced1024d1593b2affc2c..f453313ccd9fbf13f83b7a38b528ab9ee43b79f9 100644 (file)
--- a/lunaix-os/kernel/asm/x86/idt.c
+++ b/lunaix-os/kernel/asm/x86/idt.c
@@ -2,21 +2,67 @@
 #include <arch/x86/interrupts.h>
 #include <stdint.h>
 
 #include <arch/x86/interrupts.h>
 #include <stdint.h>
 

-#define IDT_ENTRY 32
+#define IDT_ENTRY 256

 
 uint64_t _idt[IDT_ENTRY];
 uint16_t _idt_limit = sizeof(_idt) - 1;
 
 
 uint64_t _idt[IDT_ENTRY];
 uint16_t _idt_limit = sizeof(_idt) - 1;
 

-void _set_idt_entry(uint32_t vector, uint16_t seg_selector, void (*isr)(), uint8_t dpl) {
+static inline void
+_set_idt_entry(uint32_t vector,
+               uint16_t seg_selector,
+               void (*isr)(),
+               uint8_t dpl,
+               uint8_t type)
+{

     uintptr_t offset = (uintptr_t)isr;
     uintptr_t offset = (uintptr_t)isr;

-    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl);
+    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl, type);

     _idt[vector] <<= 32;
     _idt[vector] |= (seg_selector << 16) | (offset & 0x0000ffff);
 }
 
     _idt[vector] <<= 32;
     _idt[vector] |= (seg_selector << 16) | (offset & 0x0000ffff);
 }
 

+void
+_set_idt_intr_entry(uint32_t vector,
+                    uint16_t seg_selector,
+                    void (*isr)(),
+                    uint8_t dpl)
+{
+    _set_idt_entry(vector, seg_selector, isr, dpl, IDT_INTERRUPT);
+}
+
+void
+_set_idt_trap_entry(uint32_t vector,
+                    uint16_t seg_selector,
+                    void (*isr)(),
+                    uint8_t dpl)
+{
+    _set_idt_entry(vector, seg_selector, isr, dpl, IDT_TRAP);
+}

 
 void
 
 void

-_init_idt() {
-    _set_idt_entry(FAULT_DIVISION_ERROR, 0x08, _asm_isr0, 0);
-    _set_idt_entry(FAULT_GENERAL_PROTECTION, 0x08, _asm_isr13, 0);
+_init_idt()
+{
+    // CPU defined interrupts
+    _set_idt_intr_entry(FAULT_DIVISION_ERROR, 0x08, _asm_isr0, 0);
+    _set_idt_intr_entry(FAULT_GENERAL_PROTECTION, 0x08, _asm_isr13, 0);
+    _set_idt_intr_entry(FAULT_PAGE_FAULT, 0x08, _asm_isr14, 0);
+
+    _set_idt_intr_entry(APIC_ERROR_IV, 0x08, _asm_isr250, 0);
+    _set_idt_intr_entry(APIC_LINT0_IV, 0x08, _asm_isr251, 0);
+    _set_idt_intr_entry(APIC_SPIV_IV, 0x08, _asm_isr252, 0);
+    _set_idt_intr_entry(APIC_TIMER_IV, 0x08, _asm_isr253, 0);
+    _set_idt_intr_entry(PC_KBD_IV, 0x08, _asm_isr201, 0);
+
+    _set_idt_intr_entry(RTC_TIMER_IV, 0x08, _asm_isr210, 0);
+
+    // system defined interrupts
+    _set_idt_intr_entry(LUNAIX_SYS_PANIC, 0x08, _asm_isr32, 0);
+
+    // syscall is a trap gate (recall: trap does NOT clear IF flag upon
+    // interruption)
+    // // XXX: this should be fine, as our design of context switch support
+    // interruptible syscall We make this a non-trap entry, and enable interrupt
+    // only when needed!
+    // FIXME: This may cause nasty concurrency bug! We should 'lockify' our
+    // code!
+    _set_idt_intr_entry(LUNAIX_SYS_CALL, 0x08, _asm_isr33, 3);

 }
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 }
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