refactor: striped more arch-related code from the kernel code base

[lunaix-os.git] / lunaix-os / includes / hal / io.h

diff --git a/lunaix-os/includes/hal/io.h b/lunaix-os/includes/hal/io.h
index cbcf2bd573644576d0a416d31e176a3e8305a63b..a3768cf38fa3b622c8b8c1c3d8d1c75b5188c38a 100644 (file)
--- a/lunaix-os/includes/hal/io.h
+++ b/lunaix-os/includes/hal/io.h
@@ -1,78 +1,123 @@
 #ifndef __LUNAIX_IO_H
 #define __LUNAIX_IO_H
 
 #ifndef __LUNAIX_IO_H
 #define __LUNAIX_IO_H
 

-#include <stdint.h>
+#include <lunaix/types.h>

 
 

-static inline uint8_t io_inb(int port) {
-    uint8_t data;
-    asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
+static inline u8_t
+io_inb(int port)
+{
+    u8_t data;
+    asm volatile("inb %w1,%0" : "=a"(data) : "d"(port));

     return data;
 }
 
     return data;
 }
 

-static inline void io_insb(int port, void* addr, int cnt) {
-    asm volatile("cld\n\trepne\n\tinsb"
-                 : "=D" (addr), "=c" (cnt)
-                 : "d" (port), "0" (addr), "1" (cnt)
+static inline void
+io_insb(int port, void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "insb"
+                 : "=D"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)

                  : "memory", "cc");
 }
 
                  : "memory", "cc");
 }
 

-static inline uint16_t io_inw(int port) {
-    uint16_t data;
-    asm volatile("inw %w1,%0" : "=a" (data) : "d" (port));
+static inline u16_t
+io_inw(int port)
+{
+    u16_t data;
+    asm volatile("inw %w1,%0" : "=a"(data) : "d"(port));

     return data;
 }
 
     return data;
 }
 

-static inline void io_insw(int port, void* addr, int cnt) {
-    asm volatile("cld\n\trepne\n\tinsw"
-                 : "=D" (addr), "=c" (cnt)
-                 : "d" (port), "0" (addr), "1" (cnt)
+static inline void
+io_insw(int port, void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "insw"
+                 : "=D"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)

                  : "memory", "cc");
 }
 
                  : "memory", "cc");
 }
 

-static inline uint32_t io_inl(int port) {
-    uint32_t data;
-    asm volatile("inl %w1,%0" : "=a" (data) : "d" (port));
+static inline u32_t
+io_inl(int port)
+{
+    u32_t data;
+    asm volatile("inl %w1,%0" : "=a"(data) : "d"(port));

     return data;
 }
 
     return data;
 }
 

-static inline void io_insl(int port, void* addr, int cnt) {
-    asm volatile("cld\n\trepne\n\tinsl"
-                 : "=D" (addr), "=c" (cnt)
-                 : "d" (port), "0" (addr), "1" (cnt)
+static inline void
+io_insl(int port, void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "insl"
+                 : "=D"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)

                  : "memory", "cc");
 }
 
                  : "memory", "cc");
 }
 

-static inline void io_outb(int port, uint8_t data) {
-    asm volatile("outb %0,%w1" : : "a" (data), "d" (port));
+static inline void
+io_outb(int port, u8_t data)
+{
+    asm volatile("outb %0, %w1" : : "a"(data), "d"(port));

 }
 
 }
 

-static inline void io_outsb(int port, const void* addr, int cnt) {
-    asm volatile("cld\n\trepne\n\toutsb"
-                 : "=S" (addr), "=c" (cnt)
-                 : "d" (port), "0" (addr), "1" (cnt)
+static inline void
+io_outsb(int port, const void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "outsb"
+                 : "=S"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)

                  : "cc");
 }
 
                  : "cc");
 }
 

-static inline void io_outw(int port, uint16_t data) {
-    asm volatile("outw %0,%w1" : : "a" (data), "d" (port));
+static inline void
+io_outw(int port, u16_t data)
+{
+    asm volatile("outw %0,%w1" : : "a"(data), "d"(port));

 }
 
 }
 

-static inline void io_outsw(int port, const void* addr, int cnt) {
-    asm volatile("cld\n\trepne\n\toutsw"
-                 : "=S" (addr), "=c" (cnt)
-                 : "d" (port), "0" (addr), "1" (cnt)
+static inline void
+io_outsw(int port, const void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "outsw"
+                 : "=S"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)

                  : "cc");
 }
 
                  : "cc");
 }
 

-static inline void io_outsl(int port, const void* addr, int cnt) {
-    asm volatile("cld\n\trepne\n\toutsl"
-                 : "=S" (addr), "=c" (cnt)
-                 : "d" (port), "0" (addr), "1" (cnt)
+static inline void
+io_outsl(int port, const void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "outsl"
+                 : "=S"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)

                  : "cc");
 }
 
                  : "cc");
 }
 

-static inline void io_outl(int port, uint32_t data) {
-    asm volatile("outl %0,%w1" : : "a" (data), "d" (port));
+static inline void
+io_outl(int port, u32_t data)
+{
+    asm volatile("outl %0,%w1" : : "a"(data), "d"(port));
+}
+static inline void
+io_delay(int counter)
+{
+    asm volatile("   test %0, %0\n"
+                 "   jz 1f\n"
+                 "2: dec %0\n"
+                 "   jnz 2b\n"
+                 "1: dec %0" ::"a"(counter));

 }
 
 #endif /* __LUNAIX_IO_H */
 }
 
 #endif /* __LUNAIX_IO_H */