refactor: Optimize the context switch overhead

[lunaix-os.git] / lunaix-os / includes / hal / pci.h

diff --git a/lunaix-os/includes/hal/pci.h b/lunaix-os/includes/hal/pci.h
index 95d5fb80f0c17d12b1c1028c1977d1a0dbdd4480..b95f89a3c4f935c19b39e3f82299b2046fd74978 100644 (file)
--- a/lunaix-os/includes/hal/pci.h
+++ b/lunaix-os/includes/hal/pci.h
@@ -3,6 +3,7 @@
 
 #include <hal/io.h>
 #include <lunaix/ds/llist.h>
+#include <lunaix/types.h>
 
 #define PCI_CONFIG_ADDR 0xcf8
 #define PCI_CONFIG_DATA 0xcfc
@@ -58,37 +59,56 @@ typedef unsigned int pci_reg_t;
 
 #define BAR_TYPE_MMIO 0x1
 #define BAR_TYPE_CACHABLE 0x2
+#define PCI_DRV_NAME_LEN 32
+
+struct pci_driver;
 
 struct pci_base_addr
 {
-    uint32_t start;
-    uint32_t size;
-    uint32_t type;
+    u32_t start;
+    u32_t size;
+    u32_t type;
 };
 
 struct pci_device
 {
     struct llist_header dev_chain;
-    uint32_t device_info;
-    uint32_t class_info;
-    uint32_t cspace_base;
-    uint32_t msi_loc;
-    uint16_t intr_info;
+    u32_t device_info;
+    u32_t class_info;
+    u32_t cspace_base;
+    u32_t msi_loc;
+    u16_t intr_info;
+    struct
+    {
+        struct pci_driver* type;
+        void* instance;
+    } driver;
     struct pci_base_addr bar[6];
 };
 
+typedef void* (*pci_drv_init)(struct pci_device*);
+
+struct pci_driver
+{
+    struct llist_header drivers;
+    u32_t dev_info;
+    u32_t dev_class;
+    pci_drv_init create_driver;
+    char name[PCI_DRV_NAME_LEN];
+};
+
 // PCI Configuration Space (C-Space) r/w:
 //      Refer to "PCI Local Bus Specification, Rev.3, Section 3.2.2.3.2"
 
 static inline pci_reg_t
-pci_read_cspace(uint32_t base, int offset)
+pci_read_cspace(u32_t base, int offset)
 {
     io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
     return io_inl(PCI_CONFIG_DATA);
 }
 
 static inline void
-pci_write_cspace(uint32_t base, int offset, pci_reg_t data)
+pci_write_cspace(u32_t base, int offset, pci_reg_t data)
 {
     io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
     io_outl(PCI_CONFIG_DATA, data);
@@ -108,7 +128,7 @@ pci_init();
  *
  * @return struct pci_device*
  */
-struct pci_device* pci_get_device_by_class(uint32_t class);
+struct pci_device* pci_get_device_by_class(u32_t class);
 
 /**
  * @brief 根据设备商ID和设备ID，在拓扑中寻找一个设备
@@ -118,7 +138,7 @@ struct pci_device* pci_get_device_by_class(uint32_t class);
  * @return struct pci_device*
  */
 struct pci_device*
-pci_get_device_by_id(uint16_t vendorId, uint16_t deviceId);
+pci_get_device_by_id(u16_t vendorId, u16_t deviceId);
 
 /**
  * @brief 初始化PCI设备的基地址寄存器。返回由该基地址代表的，
@@ -131,7 +151,7 @@ pci_get_device_by_id(uint16_t vendorId, uint16_t deviceId);
  * @return size_t
  */
 size_t
-pci_bar_sizing(struct pci_device* dev, uint32_t* bar_out, uint32_t bar_num);
+pci_bar_sizing(struct pci_device* dev, u32_t* bar_out, u32_t bar_num);
 
 /**
  * @brief 配置并启用设备MSI支持。
@@ -144,4 +164,20 @@ pci_bar_sizing(struct pci_device* dev, uint32_t* bar_out, uint32_t bar_num);
 void
 pci_setup_msi(struct pci_device* device, int vector);
 
+void
+pci_add_driver(const char* name,
+               u32_t class,
+               u32_t vendor,
+               u32_t devid,
+               pci_drv_init init);
+
+int
+pci_bind_driver(struct pci_device* pci_dev);
+
+void
+pci_probe_bar_info(struct pci_device* device);
+
+void
+pci_probe_msi_info(struct pci_device* device);
+
 #endif /* __LUNAIX_PCI_H */