feat: spec-compliant AHCI HBA initialization

[lunaix-os.git] / lunaix-os / includes / hal / ahci.h

diff --git a/lunaix-os/includes/hal/ahci.h b/lunaix-os/includes/hal/ahci.h
index 438fa5cf9ef7cf707c0fe2a29e712c96038f147b..dc30ca8b1b2e1fb290492979107c4f431a462129 100644 (file)
--- a/lunaix-os/includes/hal/ahci.h
+++ b/lunaix-os/includes/hal/ahci.h
@@ -10,6 +10,8 @@
  * All registers offset are 0 based index of a DWORD array
  */
 
+#define AHCI_HBA_CLASS 0x10601
+
 #define HBA_RCAP 0
 #define HBA_RGHC 1
 #define HBA_RIS 2
@@ -17,6 +19,7 @@
 #define HBA_RVER 4
 
 #define HBA_RPBASE (0x40)
+#define HBA_RPSIZE (0x80 >> 2)
 #define HBA_RPxCLB 0
 #define HBA_RPxFB 2
 #define HBA_RPxIS 4
@@ -32,18 +35,46 @@
 #define HBA_RPxSNTF 15
 #define HBA_RPxFBS 16
 
+#define HBA_PxCMD_FRE (1 << 4)
+#define HBA_PxCMD_ST (1)
+#define HBA_PxINTR_DMA (1 << 2)
+#define HBA_PxINTR_D2HR (1)
+
+#define HBA_RGHC_ACHI_ENABLE (1 << 31)
+#define HBA_RGHC_INTR_ENABLE (1 << 1)
+#define HBA_RGHC_RESET 1
+
+#define HBA_RPxSSTS_PWR(x) (((x) >> 8) & 0xf)
+#define HBA_RPxSSTS_IF(x) (((x) >> 4) & 0xf)
+#define HBA_RPxSSTS_PHYSTATE(x) ((x)&0xf)
+
 typedef unsigned int hba_reg_t;
 
+struct ahci_port
+{
+    hba_reg_t* regs;
+    unsigned int ssts;
+    void* cmdlstv;
+    void* fisv;
+};
+
 struct ahci_hba
 {
     volatile hba_reg_t* base;
     unsigned int ports_num;
-    unsigned int port_map;
+    unsigned int cmd_slots;
     unsigned int version;
-    hba_reg_t* ports[32];
+    struct ahci_port* ports[32];
 };
 
+/**
+ * @brief 初始化AHCI与HBA
+ *
+ */
 void
 ahci_init();
 
+void
+ahci_list_device();
+
 #endif /* __LUNAIX_AHCI_H */