PCI 16x50 UART Controller, O2 Enablement (#39)

[lunaix-os.git] / lunaix-os / hal / ahci / ahci.c

diff --git a/lunaix-os/hal/ahci/ahci.c b/lunaix-os/hal/ahci/ahci.c
index 0f1ebf33810fcd1ce9fcadb9a667b497c3458a14..82375e0a9dda85670435f1e2c21d4e09ea40b392 100644 (file)
--- a/lunaix-os/hal/ahci/ahci.c
+++ b/lunaix-os/hal/ahci/ahci.c
@@ -14,16 +14,14 @@
 #include <hal/ahci/scsi.h>
 #include <hal/pci.h>
 
-#include <sys/pci_hba.h>
 #include <sys/port_io.h>
 
 #include <klibc/string.h>
 #include <lunaix/block.h>
-#include <lunaix/isrm.h>
+#include <lunaix/generic/isrm.h>
 #include <lunaix/mm/mmio.h>
-#include <lunaix/mm/pmm.h>
 #include <lunaix/mm/valloc.h>
-#include <lunaix/mm/vmm.h>
+#include <lunaix/mm/page.h>
 #include <lunaix/spike.h>
 #include <lunaix/syslog.h>
 
@@ -128,16 +126,19 @@ ahci_driver_init(struct ahci_driver_param* param)
         __hba_reset_port(port_regs);
 #endif
 
+        struct leaflet* leaflet;
         if (!clbp) {
             // 每页最多4个命令队列
-            clb_pa = pmm_alloc_page(PP_FGLOCKED);
-            clb_pg_addr = (ptr_t)ioremap(clb_pa, 0x1000);
+            leaflet = alloc_leaflet(0);
+            clb_pa = leaflet_addr(leaflet);
+            clb_pg_addr = vmap(leaflet, KERNEL_DATA);
             memset((void*)clb_pg_addr, 0, 0x1000);
         }
         if (!fisp) {
             // 每页最多16个FIS
-            fis_pa = pmm_alloc_page(PP_FGLOCKED);
-            fis_pg_addr = (ptr_t)ioremap(fis_pa, 0x1000);
+            leaflet = alloc_leaflet(0);
+            fis_pa = leaflet_addr(leaflet);
+            fis_pg_addr = vmap(leaflet, KERNEL_DATA);
             memset((void*)fis_pg_addr, 0, 0x1000);
         }