acpi_sdthdr_t header;
u32_t firmware_controller_addr;
u32_t dsdt_addr;
- uint8_t reserved;
- uint8_t pm_profile;
- uint16_t sci_int;
+ u8_t reserved;
+ u8_t pm_profile;
+ u16_t sci_int;
u32_t smi_cmd_port_addr;
- uint8_t smi_acpi_enable;
- uint8_t smi_acpi_disable;
- uint8_t smi_s4bios_state;
- uint8_t smi_pstate;
+ u8_t smi_acpi_enable;
+ u8_t smi_acpi_disable;
+ u8_t smi_s4bios_state;
+ u8_t smi_pstate;
u32_t pm_reg_ports[6];
u32_t gpe0_port_addr;
u32_t gpe1_port_addr;
- uint8_t pm_reg_lens[4];
- uint8_t gpe0_len;
- uint8_t gpe1_len;
- uint8_t gpe1_base;
- uint8_t cst_cnt;
- uint16_t p_lvl2_lat;
- uint16_t p_lvl3_lat;
- uint16_t flush_size;
- uint16_t flush_stride;
- uint8_t duty_offset;
- uint8_t duty_width;
- uint8_t time_info[3];
- uint16_t boot_arch;
+ u8_t pm_reg_lens[4];
+ u8_t gpe0_len;
+ u8_t gpe1_len;
+ u8_t gpe1_base;
+ u8_t cst_cnt;
+ u16_t p_lvl2_lat;
+ u16_t p_lvl3_lat;
+ u16_t flush_size;
+ u16_t flush_stride;
+ u8_t duty_offset;
+ u8_t duty_width;
+ u8_t time_info[3];
+ u16_t boot_arch;
} ACPI_TABLE_PACKED acpi_fadt_t;
// TODO: FADT parser & support