Decoupling Architectural-specific Code (#35)

[lunaix-os.git] / lunaix-os / arch / i386 / includes / sys / cpu.h

diff --git a/lunaix-os/arch/i386/includes/sys/cpu.h b/lunaix-os/arch/i386/includes/sys/cpu.h
index 3289522af918840f3172ca4fe275049c86bb5483..ca7080a028ce1a6db0a4fdc3233346df017880a0 100644 (file)
--- a/lunaix-os/arch/i386/includes/sys/cpu.h
+++ b/lunaix-os/arch/i386/includes/sys/cpu.h
@@ -17,20 +17,13 @@ cpu_trap_sched();
 void
 cpu_trap_panic(char* message);
 
-static inline ptr_t
-cpu_get_fp()
-{
-    ptr_t val;
-    asm("movl %%ebp, %0" : "=r"(val)::);
-    return val;
-}
 
 /**
  * @brief Load current processor state
  *
- * @return u32_t
+ * @return reg_t
  */
-static inline u32_t
+static inline reg_t
 cpu_ldstate()
 {
     ptr_t val;
@@ -43,12 +36,12 @@ cpu_ldstate()
 /**
  * @brief Load current processor config
  *
- * @return u32_t
+ * @return reg_t
  */
-static inline u32_t
+static inline reg_t
 cpu_ldconfig()
 {
-    ptr_t val;
+    reg_t val;
     asm volatile("movl %%cr0,%0" : "=r"(val));
     return val;
 }
@@ -56,57 +49,25 @@ cpu_ldconfig()
 /**
  * @brief Change current processor state
  *
- * @return u32_t
+ * @return reg_t
  */
 static inline void
-cpu_chconfig(u32_t val)
+cpu_chconfig(reg_t val)
 {
     asm("mov %0, %%cr0" ::"r"(val));
 }
 
-/**
- * @brief Load current virtual memory space
- *
- * @return u32_t
- */
-static inline u32_t
-cpu_ldvmspace()
-{
-    ptr_t val;
-    asm volatile("movl %%cr3,%0" : "=r"(val));
-    return val;
-}
-
 /**
  * @brief Change current virtual memory space
  *
- * @return u32_t
+ * @return reg_t
  */
 static inline void
-cpu_chvmspace(u32_t val)
+cpu_chvmspace(reg_t val)
 {
     asm("mov %0, %%cr3" ::"r"(val));
 }
 
-/**
- * @brief Flush TLB
- *
- * @return u32_t
- */
-static inline void
-cpu_flush_page(ptr_t va)
-{
-    asm volatile("invlpg (%0)" ::"r"(va) : "memory");
-}
-
-static inline void
-cpu_flush_vmspace()
-{
-    asm("movl %%cr3, %%eax\n"
-        "movl %%eax, %%cr3" ::
-          : "eax");
-}
-
 static inline void
 cpu_enable_interrupt()
 {
@@ -125,6 +86,11 @@ cpu_wait()
     asm("hlt");
 }
 
+/**
+ * @brief Read exeception address
+ *
+ * @return ptr_t
+ */
 static inline ptr_t
 cpu_ldeaddr()
 {