refactor: isrm to centeralize interrupt/irq resources management.

[lunaix-os.git] / lunaix-os / hal / ahci / ahci.c

diff --git a/lunaix-os/hal/ahci/ahci.c b/lunaix-os/hal/ahci/ahci.c
index 206112e1d79d0e99c85ab8bc0144c4422f99c4db..74ba92885c61cc9674a4b33c0dffaeb03de10e6b 100644 (file)
--- a/lunaix-os/hal/ahci/ahci.c
+++ b/lunaix-os/hal/ahci/ahci.c
@@ -16,6 +16,7 @@
 #include <hal/pci.h>
 #include <klibc/string.h>
 #include <lunaix/block.h>
+#include <lunaix/isrm.h>
 #include <lunaix/mm/mmio.h>
 #include <lunaix/mm/pmm.h>
 #include <lunaix/mm/valloc.h>
@@ -78,9 +79,8 @@ ahci_init()
     struct pci_device* ahci_dev = pci_get_device_by_class(AHCI_HBA_CLASS);
     assert_msg(ahci_dev, "AHCI: Not found.");
 
-    uintptr_t bar6, size;
-    size = pci_bar_sizing(ahci_dev, &bar6, 6);
-    assert_msg(bar6 && PCI_BAR_MMIO(bar6), "AHCI: BAR#6 is not MMIO.");
+    struct pci_base_addr* bar6 = &ahci_dev->bar[5];
+    assert_msg(bar6->type & BAR_TYPE_MMIO, "AHCI: BAR#6 is not MMIO.");
 
     pci_reg_t cmd = pci_read_cspace(ahci_dev->cspace_base, PCI_REG_STATUS_CMD);
 
@@ -89,12 +89,11 @@ ahci_init()
 
     pci_write_cspace(ahci_dev->cspace_base, PCI_REG_STATUS_CMD, cmd);
 
-    pci_setup_msi(ahci_dev, AHCI_HBA_IV);
-    intr_subscribe(AHCI_HBA_IV, __ahci_hba_isr);
+    pci_setup_msi(ahci_dev, isrm_ivexalloc(__ahci_hba_isr));
 
     memset(&hba, 0, sizeof(hba));
 
-    hba.base = (hba_reg_t*)ioremap(PCI_BAR_ADDR_MM(bar6), size);
+    hba.base = (hba_reg_t*)ioremap(bar6->start, bar6->size);
 
 #ifdef DO_HBA_FULL_RESET
     // 重置HBA