fix: the correct way to detect ahci LBA48 support

[lunaix-os.git] / lunaix-os / hal / ahci / utils.c

diff --git a/lunaix-os/hal/ahci/utils.c b/lunaix-os/hal/ahci/utils.c
index 96d163b93585ed8a0f7a273e25506f07a4d2b631..923f916d78e52f1ccf0113ca712132c2c321134c 100644 (file)
--- a/lunaix-os/hal/ahci/utils.c
+++ b/lunaix-os/hal/ahci/utils.c
@@ -13,28 +13,30 @@
 #define IDDEV_OFFSERIALNUM 10
 #define IDDEV_OFFMODELNUM 27
 #define IDDEV_OFFADDSUPPORT 69
 #define IDDEV_OFFSERIALNUM 10
 #define IDDEV_OFFMODELNUM 27
 #define IDDEV_OFFADDSUPPORT 69

+#define IDDEV_OFFA48SUPPORT 83

 #define IDDEV_OFFALIGN 209
 #define IDDEV_OFFLPP 106
 #define IDDEV_OFFCAPABILITIES 49
 
 #define IDDEV_OFFALIGN 209
 #define IDDEV_OFFLPP 106
 #define IDDEV_OFFCAPABILITIES 49
 

-static uint32_t cdb_size[] = { SCSI_CDB12, SCSI_CDB16, 0, 0 };
+static u32_t cdb_size[] = { SCSI_CDB12, SCSI_CDB16, 0, 0 };

 
 void
 ahci_parse_dev_info(struct hba_device* dev_info, uint16_t* data)
 {
 
 void
 ahci_parse_dev_info(struct hba_device* dev_info, uint16_t* data)
 {

-    dev_info->max_lba = *((uint32_t*)(data + IDDEV_OFFMAXLBA));
-    dev_info->block_size = *((uint32_t*)(data + IDDEV_OFFLSECSIZE));
+    dev_info->max_lba = *((u32_t*)(data + IDDEV_OFFMAXLBA));
+    dev_info->block_size = *((u32_t*)(data + IDDEV_OFFLSECSIZE));

     dev_info->cbd_size = cdb_size[(*data & 0x3)];
     dev_info->wwn = *(uint64_t*)(data + IDDEV_OFFWWN);
     dev_info->block_per_sec = 1 << (*(data + IDDEV_OFFLPP) & 0xf);
     dev_info->alignment_offset = *(data + IDDEV_OFFALIGN) & 0x3fff;
     dev_info->cbd_size = cdb_size[(*data & 0x3)];
     dev_info->wwn = *(uint64_t*)(data + IDDEV_OFFWWN);
     dev_info->block_per_sec = 1 << (*(data + IDDEV_OFFLPP) & 0xf);
     dev_info->alignment_offset = *(data + IDDEV_OFFALIGN) & 0x3fff;

-    dev_info->capabilities = *((uint32_t*)(data + IDDEV_OFFCAPABILITIES));
+    dev_info->capabilities = *((u32_t*)(data + IDDEV_OFFCAPABILITIES));

 
     if (!dev_info->block_size) {
         dev_info->block_size = 512;
     }
 
 
     if (!dev_info->block_size) {
         dev_info->block_size = 512;
     }
 

-    if ((*(data + IDDEV_OFFADDSUPPORT) & 0x8)) {
+    if ((*(data + IDDEV_OFFADDSUPPORT) & 0x8) &&
+        (*(data + IDDEV_OFFA48SUPPORT) & 0x400)) {

         dev_info->max_lba = *((uint64_t*)(data + IDDEV_OFFMAXLBA_EXT));
         dev_info->flags |= HBA_DEV_FEXTLBA;
     }
         dev_info->max_lba = *((uint64_t*)(data + IDDEV_OFFMAXLBA_EXT));
         dev_info->flags |= HBA_DEV_FEXTLBA;
     }


@@ -85,4 +87,19 @@ ahci_try_send(struct hba_port* port, int slot)
     hba_clear_reg(port->regs[HBA_RPxIS]);
 
     return retries < MAX_RETRY;
     hba_clear_reg(port->regs[HBA_RPxIS]);
 
     return retries < MAX_RETRY;

+}
+
+void
+ahci_post(struct hba_port* port, struct hba_cmd_state* state, int slot)
+{
+    int bitmask = 1 << slot;
+
+    // 确保端口是空闲的
+    wait_until(!(port->regs[HBA_RPxTFD] & (HBA_PxTFD_BSY | HBA_PxTFD_DRQ)));
+
+    hba_clear_reg(port->regs[HBA_RPxIS]);
+
+    port->cmdctx.issued[slot] = state;
+    port->cmdctx.tracked_ci |= bitmask;
+    port->regs[HBA_RPxCI] |= bitmask;

 }
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 }
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