refactor: striped more arch-related code from the kernel code base

[lunaix-os.git] / lunaix-os / includes / hal / io.h

diff --git a/lunaix-os/includes/hal/io.h b/lunaix-os/includes/hal/io.h
index 0f5e9d61e1c76d90bba33d6750ce5cda9acacebe..a3768cf38fa3b622c8b8c1c3d8d1c75b5188c38a 100644 (file)
--- a/lunaix-os/includes/hal/io.h
+++ b/lunaix-os/includes/hal/io.h
@@ -1,41 +1,123 @@
 #ifndef __LUNAIX_IO_H
 #define __LUNAIX_IO_H
 
-#include <stdint.h>
-
-void io_port_wb(uint8_t port, uint8_t value) {
-    asm volatile (
-        "movb %0, %%al\n"
-        "movb %1, %%dx\n"
-        "out %%al, %%dx\n"
-        :: "r"(value) "r"(port)
-    );
-}
-
-void io_port_wl(uint8_t port, uint32_t value) {
-    asm volatile (
-        "movl %0, %%eax\n"
-        "movb %1, %%dx\n"
-        "out %%eax, %%dx\n"
-        :: "r"(value) "r"(port)
-    );
-}
-
-uint8_t io_port_rb(uint8_t port) {
-    asm volatile (
-        "movb $0, %%eax\n"
-        "movb %0, %%dx\n"
-        "in %%dx, %%al\n"
-        :: "r"(port)
-    );
-}
-
-uint32_t io_port_rl(uint8_t port) {
-    asm volatile (
-        "movb %0, %%dx\n"
-        "in %%dx, %%eax\n"
-        :: "r"(port)
-    );
+#include <lunaix/types.h>
+
+static inline u8_t
+io_inb(int port)
+{
+    u8_t data;
+    asm volatile("inb %w1,%0" : "=a"(data) : "d"(port));
+    return data;
+}
+
+static inline void
+io_insb(int port, void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "insb"
+                 : "=D"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)
+                 : "memory", "cc");
+}
+
+static inline u16_t
+io_inw(int port)
+{
+    u16_t data;
+    asm volatile("inw %w1,%0" : "=a"(data) : "d"(port));
+    return data;
+}
+
+static inline void
+io_insw(int port, void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "insw"
+                 : "=D"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)
+                 : "memory", "cc");
+}
+
+static inline u32_t
+io_inl(int port)
+{
+    u32_t data;
+    asm volatile("inl %w1,%0" : "=a"(data) : "d"(port));
+    return data;
+}
+
+static inline void
+io_insl(int port, void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "insl"
+                 : "=D"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)
+                 : "memory", "cc");
+}
+
+static inline void
+io_outb(int port, u8_t data)
+{
+    asm volatile("outb %0, %w1" : : "a"(data), "d"(port));
+}
+
+static inline void
+io_outsb(int port, const void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "outsb"
+                 : "=S"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)
+                 : "cc");
+}
+
+static inline void
+io_outw(int port, u16_t data)
+{
+    asm volatile("outw %0,%w1" : : "a"(data), "d"(port));
+}
+
+static inline void
+io_outsw(int port, const void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "outsw"
+                 : "=S"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)
+                 : "cc");
+}
+
+static inline void
+io_outsl(int port, const void* addr, int cnt)
+{
+    asm volatile("cld\n"
+                 "repne\n"
+                 "outsl"
+                 : "=S"(addr), "=c"(cnt)
+                 : "d"(port), "0"(addr), "1"(cnt)
+                 : "cc");
+}
+
+static inline void
+io_outl(int port, u32_t data)
+{
+    asm volatile("outl %0,%w1" : : "a"(data), "d"(port));
+}
+static inline void
+io_delay(int counter)
+{
+    asm volatile("   test %0, %0\n"
+                 "   jz 1f\n"
+                 "2: dec %0\n"
+                 "   jnz 2b\n"
+                 "1: dec %0" ::"a"(counter));
 }
 
 #endif /* __LUNAIX_IO_H */