+_init_idt()
+{
+ // CPU defined interrupts
+ _set_idt_intr_entry(FAULT_DIVISION_ERROR, 0x08, _asm_isr0, 0);
+ _set_idt_intr_entry(FAULT_GENERAL_PROTECTION, 0x08, _asm_isr13, 0);
+ _set_idt_intr_entry(FAULT_PAGE_FAULT, 0x08, _asm_isr14, 0);
+ _set_idt_intr_entry(FAULT_STACK_SEG_FAULT, 0x08, _asm_isr12, 0);
+
+ _set_idt_intr_entry(APIC_ERROR_IV, 0x08, _asm_isr250, 0);
+ _set_idt_intr_entry(APIC_LINT0_IV, 0x08, _asm_isr251, 0);
+ _set_idt_intr_entry(APIC_SPIV_IV, 0x08, _asm_isr252, 0);
+ _set_idt_intr_entry(APIC_TIMER_IV, 0x08, _asm_isr253, 0);
+
+ _set_idt_intr_entry(PC_KBD_IV, 0x08, _asm_isr201, 0);
+ _set_idt_intr_entry(AHCI_HBA_IV, 0x08, _asm_isr202, 0);
+
+ _set_idt_intr_entry(RTC_TIMER_IV, 0x08, _asm_isr210, 0);
+
+ // system defined interrupts
+ _set_idt_intr_entry(LUNAIX_SYS_PANIC, 0x08, _asm_isr32, 0);
+
+ // We make this a non-trap entry, and enable interrupt
+ // only when needed!
+ _set_idt_intr_entry(LUNAIX_SYS_CALL, 0x08, _asm_isr33, 3);
+
+ _set_idt_intr_entry(LUNAIX_SCHED, 0x08, _asm_isr34, 0);