feat: lru eviction policy on page caches

[lunaix-os.git] / lunaix-os / hal / pci.c

diff --git a/lunaix-os/hal/pci.c b/lunaix-os/hal/pci.c
index 50fe80d6c109fa7ffa8e04121b7b7d65f0393cf0..3d6accfafaacf31dc9d026c44b4a60e471a11191 100644 (file)
--- a/lunaix-os/hal/pci.c
+++ b/lunaix-os/hal/pci.c
@@ -126,7 +126,7 @@ pci_print_device()
                 PCI_INTR_IRQ(pos->intr_info),
                 PCI_INTR_PIN(pos->intr_info));
 #ifdef PCI_PRINT_BAR_LISTING
-        pci_reg_t bar;
+        uint32_t bar;
         for (size_t i = 1; i <= 6; i++) {
             size_t size = pci_bar_sizing(pos, &bar, i);
             if (!bar)
@@ -181,10 +181,19 @@ pci_setup_msi(struct pci_device* device, int vector)
 
     pci_write_cspace(
       device->cspace_base, PCI_MSI_ADDR(device->msi_loc), msi_addr);
-    pci_write_cspace(
-      device->cspace_base, PCI_MSI_DATA(device->msi_loc), msi_data & 0xffff);
 
     pci_reg_t reg1 = pci_read_cspace(device->cspace_base, device->msi_loc);
+    pci_reg_t msg_ctl = reg1 >> 16;
+
+    int offset = !!(msg_ctl & MSI_CAP_64BIT) * 4;
+    pci_write_cspace(device->cspace_base,
+                     PCI_MSI_DATA(device->msi_loc, offset),
+                     msi_data & 0xffff);
+
+    if ((msg_ctl & MSI_CAP_MASK)) {
+        pci_write_cspace(
+          device->cspace_base, PCI_MSI_MASK(device->msi_loc, offset), 0);
+    }
 
     // manipulate the MSI_CTRL to allow device using MSI to request service.
     reg1 = (reg1 & 0xff8fffff) | 0x10000;