feat: page caching layer for vfs

[lunaix-os.git] / lunaix-os / hal / pci.c

diff --git a/lunaix-os/hal/pci.c b/lunaix-os/hal/pci.c
index c3771d571e2a10885521d5ecb9922acda7b3efa4..50fe80d6c109fa7ffa8e04121b7b7d65f0393cf0 100644 (file)
--- a/lunaix-os/hal/pci.c
+++ b/lunaix-os/hal/pci.c
@@ -11,7 +11,7 @@
 #include <hal/acpi/acpi.h>
 #include <hal/apic.h>
 #include <hal/pci.h>
-#include <lunaix/mm/kalloc.h>
+#include <lunaix/mm/valloc.h>
 #include <lunaix/spike.h>
 #include <lunaix/syslog.h>
 
@@ -55,7 +55,7 @@ pci_probe_device(int bus, int dev, int funct)
     pci_reg_t intr = pci_read_cspace(base, 0x3c);
     pci_reg_t class = pci_read_cspace(base, 0x8);
 
-    struct pci_device* device = lxmalloc(sizeof(struct pci_device));
+    struct pci_device* device = valloc(sizeof(struct pci_device));
     *device = (struct pci_device){ .cspace_base = base,
                                    .class_info = class,
                                    .device_info = reg1,
@@ -174,7 +174,7 @@ void
 pci_setup_msi(struct pci_device* device, int vector)
 {
     // Dest: APIC#0, Physical Destination, No redirection
-    uint32_t msi_addr = (__APIC_BASE_PADDR | 0x8);
+    uint32_t msi_addr = (__APIC_BASE_PADDR);
 
     // Edge trigger, Fixed delivery
     uint32_t msi_data = vector;
@@ -187,7 +187,7 @@ pci_setup_msi(struct pci_device* device, int vector)
     pci_reg_t reg1 = pci_read_cspace(device->cspace_base, device->msi_loc);
 
     // manipulate the MSI_CTRL to allow device using MSI to request service.
-    reg1 = ((((reg1 >> 16) & ~0x70) | 0x1) << 16) | (reg1 & 0xffff);
+    reg1 = (reg1 & 0xff8fffff) | 0x10000;
     pci_write_cspace(device->cspace_base, device->msi_loc, reg1);
 }