X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/05b7549a0f980efa33265a091a5174a78851ce05..a4ec38a4c7ef61b04b92d34637c846a8e2e95f7f:/lunaix-os/includes/hal/cpu.h?ds=inline

diff --git a/lunaix-os/includes/hal/cpu.h b/lunaix-os/includes/hal/cpu.h
index bdb07c4..5789d4a 100644
--- a/lunaix-os/includes/hal/cpu.h
+++ b/lunaix-os/includes/hal/cpu.h
@@ -3,6 +3,8 @@
 
 #include <stdint.h>
 
+#define SEL_RPL(selector) ((selector)&0x3)
+
 typedef unsigned int reg32;
 typedef unsigned short reg16;
 
@@ -20,12 +22,10 @@ typedef struct
 
 typedef struct
 {
-    reg16 ss;
-    reg16 es;
     reg16 ds;
+    reg16 es;
     reg16 fs;
     reg16 gs;
-    reg16 cs;
 } __attribute__((packed)) sg_reg;
 
 void
@@ -39,19 +39,35 @@ cpu_has_apic();
 static inline reg32
 cpu_rcr0()
 {
-    asm("mov %cr0, %eax");
+    uintptr_t val;
+    asm volatile("movl %%cr0,%0" : "=r"(val));
+    return val;
 }
 
 static inline reg32
 cpu_rcr2()
 {
-    asm("mov %cr2, %eax");
+    uintptr_t val;
+    asm volatile("movl %%cr2,%0" : "=r"(val));
+    return val;
 }
 
 static inline reg32
 cpu_rcr3()
 {
-    asm("mov %cr3, %eax");
+    uintptr_t val;
+    asm volatile("movl %%cr3,%0" : "=r"(val));
+    return val;
+}
+
+static inline reg32
+cpu_reflags()
+{
+    uintptr_t val;
+    asm volatile("pushf\n"
+                 "popl %0\n"
+                 : "=r"(val)::);
+    return val;
 }
 #pragma GCC diagnostic pop
 
@@ -101,6 +117,12 @@ cpu_invtlb()
         : "r"(interm));
 }
 
+static inline void
+cpu_int(int vect)
+{
+    asm("int %0" ::"i"(vect));
+}
+
 void
 cpu_rdmsr(uint32_t msr_idx, uint32_t* reg_high, uint32_t* reg_low);