X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/1025235c72c31f7fa7b648c0e32ddcaa68a8f66a..2b0380cba5e5adc73299bbaccdc7d20b84825cc1:/lunaix-os/arch/LConfig

diff --git a/lunaix-os/arch/LConfig b/lunaix-os/arch/LConfig
index 30c67b6..a78038f 100644
--- a/lunaix-os/arch/LConfig
+++ b/lunaix-os/arch/LConfig
@@ -1,13 +1,62 @@
-include("i386/LConfig")
+from . import x86
 
-@Collection
+@"Platform"
 def architecture_support():
     """
         Config ISA related features
     """
 
-    @Term
-    def arch():
-        """ Config ISA support """
-        type(["i386", "x86_64", "aarch64", "rv64"])
-        default("i386")
+    @flag
+    def arch_x86_32() -> bool:
+        when(arch is "i386")
+    
+    @flag
+    def arch_x86_64() -> bool:
+        when(arch is "x86_64")
+    
+    @flag
+    def arch_x86() -> bool:
+        when(arch is "i386")
+        when(arch is "x86_64")
+
+    @"Architecture"
+    def arch() -> "i386" | "x86_64":
+        """ 
+            Config ISA support 
+        """
+
+        match env("ARCH"):
+            case "i386": 
+                return "i386"
+            case "aarch64": 
+                return "aarch64"
+            case "rv64": 
+                return "rv64"
+            case "x86_64": 
+                return "x86_64"
+
+        print("unknown ARCH:", env("ARCH"), "default to x86_64")
+        return "x86_64"
+
+    @"Base operand size"
+    @readonly
+    def arch_bits() -> 32 | 64:
+        """ 
+            Defines the base size of a general register of the 
+            current selected ISA.
+
+            This the 'bits' part when we are talking about a CPU
+        """
+
+        match arch.val:
+            case "i386": 
+                return 32
+            case "aarch64": 
+                return 64
+            case "rv64": 
+                return 64
+            case "x86_64": 
+                return 64
+            case _:
+                return 32
+        
\ No newline at end of file