X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/28c176b668c841a3b7fb093faccf0efa39257603..bcc25888b3299758ad36721530cca3b899b7166c:/lunaix-os/arch/LConfig

diff --git a/lunaix-os/arch/LConfig b/lunaix-os/arch/LConfig
index 22f96c0..7afea85 100644
--- a/lunaix-os/arch/LConfig
+++ b/lunaix-os/arch/LConfig
@@ -1,24 +1,34 @@
 include("x86/LConfig")
 
-@Collection
+@Collection("Platform")
 def architecture_support():
     """
         Config ISA related features
     """
 
-    @Term
+    @Term("Architecture")
     def arch():
-        """ Config ISA support """
-        type(["i386", "x86_64", "aarch64", "rv64"])
-        default("i386")
+        """ 
+            Config ISA support 
+        """
+        # type(["i386", "x86_64", "aarch64", "rv64"])
+        type(["i386", "x86_64"])
+        default("x86_64")
 
         env_val = env("ARCH")
-        if env_val is not None:
+        if env_val:
             set_value(env_val)
 
-    @Term
+    @Term("Base operand size")
     @ReadOnly
     def arch_bits():
+        """ 
+            Defines the base size of a general register of the 
+            current selected ISA.
+
+            This the 'bits' part when we are talking about a CPU
+        """
+
         type(["64", "32"])
         match v(arch):
             case "i386":