X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/43c43c058ededea929645fef68d15820eed1f5e9..1fe5f5eb5378a47bf0f3451762743c162e40faad:/lunaix-os/includes/hal/pci.h

diff --git a/lunaix-os/includes/hal/pci.h b/lunaix-os/includes/hal/pci.h
index 21952f2..2cc45b2 100644
--- a/lunaix-os/includes/hal/pci.h
+++ b/lunaix-os/includes/hal/pci.h
@@ -1,13 +1,10 @@
 #ifndef __LUNAIX_PCI_H
 #define __LUNAIX_PCI_H
 
-#include <hal/io.h>
+#include <lunaix/ds/ldga.h>
 #include <lunaix/ds/llist.h>
 #include <lunaix/types.h>
 
-#define PCI_CONFIG_ADDR 0xcf8
-#define PCI_CONFIG_DATA 0xcfc
-
 #define PCI_TDEV 0x0
 #define PCI_TPCIBRIDGE 0x1
 #define PCI_TCARDBRIDGE 0x2
@@ -61,23 +58,31 @@ typedef unsigned int pci_reg_t;
 #define BAR_TYPE_CACHABLE 0x2
 #define PCI_DRV_NAME_LEN 32
 
+#define EXPORT_PCI_DEVICE(name_, class, vendor_id, dev_id, init_fn)            \
+    static struct pci_driver pcidev_##name_ =                                  \
+      (struct pci_driver){ .name = #name_,                                     \
+                           .create_driver = (init_fn),                         \
+                           .dev_info = ((vendor_id) << 16) | (dev_id),         \
+                           .dev_class = (class) };                             \
+    export_ldga_el(pci_dev_drivers, name_, ptr_t, &pcidev_##name_)
+
 struct pci_driver;
 
 struct pci_base_addr
 {
-    uint32_t start;
-    uint32_t size;
-    uint32_t type;
+    u32_t start;
+    u32_t size;
+    u32_t type;
 };
 
 struct pci_device
 {
     struct llist_header dev_chain;
-    uint32_t device_info;
-    uint32_t class_info;
-    uint32_t cspace_base;
-    uint32_t msi_loc;
-    uint16_t intr_info;
+    u32_t device_info;
+    u32_t class_info;
+    u32_t cspace_base;
+    u32_t msi_loc;
+    u16_t intr_info;
     struct
     {
         struct pci_driver* type;
@@ -97,30 +102,13 @@ struct pci_driver
     char name[PCI_DRV_NAME_LEN];
 };
 
-// PCI Configuration Space (C-Space) r/w:
-//      Refer to "PCI Local Bus Specification, Rev.3, Section 3.2.2.3.2"
-
-static inline pci_reg_t
-pci_read_cspace(uint32_t base, int offset)
-{
-    io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
-    return io_inl(PCI_CONFIG_DATA);
-}
-
-static inline void
-pci_write_cspace(uint32_t base, int offset, pci_reg_t data)
-{
-    io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
-    io_outl(PCI_CONFIG_DATA, data);
-}
-
 /**
  * @brief 初始化PCI。这主要是通过扫描PCI总线进行拓扑重建。注意，该
  * 初始化不包括针对每个设备的初始化，因为那是设备驱动的事情。
  *
  */
 void
-pci_init();
+pci_load_devices();
 
 /**
  * @brief 根据类型代码（Class Code）去在拓扑中寻找一个设备
@@ -128,7 +116,7 @@ pci_init();
  *
  * @return struct pci_device*
  */
-struct pci_device* pci_get_device_by_class(uint32_t class);
+struct pci_device* pci_get_device_by_class(u32_t class);
 
 /**
  * @brief 根据设备商ID和设备ID，在拓扑中寻找一个设备
@@ -138,7 +126,7 @@ struct pci_device* pci_get_device_by_class(uint32_t class);
  * @return struct pci_device*
  */
 struct pci_device*
-pci_get_device_by_id(uint16_t vendorId, uint16_t deviceId);
+pci_get_device_by_id(u16_t vendorId, u16_t deviceId);
 
 /**
  * @brief 初始化PCI设备的基地址寄存器。返回由该基地址代表的，
@@ -151,18 +139,7 @@ pci_get_device_by_id(uint16_t vendorId, uint16_t deviceId);
  * @return size_t
  */
 size_t
-pci_bar_sizing(struct pci_device* dev, uint32_t* bar_out, uint32_t bar_num);
-
-/**
- * @brief 配置并启用设备MSI支持。
- * 参阅：PCI LB Spec. (Rev 3) Section 6.8 & 6.8.1
- * 以及：Intel Manual, Vol 3, Section 10.11
- *
- * @param device PCI device
- * @param vector interrupt vector.
- */
-void
-pci_setup_msi(struct pci_device* device, int vector);
+pci_bar_sizing(struct pci_device* dev, u32_t* bar_out, u32_t bar_num);
 
 void
 pci_add_driver(const char* name,
@@ -174,4 +151,10 @@ pci_add_driver(const char* name,
 int
 pci_bind_driver(struct pci_device* pci_dev);
 
+void
+pci_probe_bar_info(struct pci_device* device);
+
+void
+pci_probe_msi_info(struct pci_device* device);
+
 #endif /* __LUNAIX_PCI_H */