X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/48b4a227035048fdebcd32532deb7a857c6199ac..642855f81fd03b9fd6540ac99c665b57b4b38cc8:/lunaix-os/includes/hal/cpu.h diff --git a/lunaix-os/includes/hal/cpu.h b/lunaix-os/includes/hal/cpu.h index b155d4b..ae9926b 100644 --- a/lunaix-os/includes/hal/cpu.h +++ b/lunaix-os/includes/hal/cpu.h @@ -1,7 +1,9 @@ #ifndef __LUNAIX_CPU_H #define __LUNAIX_CPU_H -#include +#include + +#define SEL_RPL(selector) ((selector)&0x3) typedef unsigned int reg32; typedef unsigned short reg16; @@ -20,12 +22,10 @@ typedef struct typedef struct { - reg16 ss; - reg16 es; reg16 ds; + reg16 es; reg16 fs; reg16 gs; - reg16 cs; } __attribute__((packed)) sg_reg; void @@ -40,7 +40,7 @@ static inline reg32 cpu_rcr0() { uintptr_t val; - asm volatile("movl %%cr0,%0" : "=r" (val)); + asm volatile("movl %%cr0,%0" : "=r"(val)); return val; } @@ -48,7 +48,7 @@ static inline reg32 cpu_rcr2() { uintptr_t val; - asm volatile("movl %%cr2,%0" : "=r" (val)); + asm volatile("movl %%cr2,%0" : "=r"(val)); return val; } @@ -56,7 +56,7 @@ static inline reg32 cpu_rcr3() { uintptr_t val; - asm volatile("movl %%cr3,%0" : "=r" (val)); + asm volatile("movl %%cr3,%0" : "=r"(val)); return val; } @@ -64,10 +64,9 @@ static inline reg32 cpu_reflags() { uintptr_t val; - asm volatile( - "pushf\n" - "popl %0\n" - :"=r"(val)::); + asm volatile("pushf\n" + "popl %0\n" + : "=r"(val)::); return val; } #pragma GCC diagnostic pop @@ -118,10 +117,16 @@ cpu_invtlb() : "r"(interm)); } +static inline void +cpu_int(int vect) +{ + asm("int %0" ::"i"(vect)); +} + void -cpu_rdmsr(uint32_t msr_idx, uint32_t* reg_high, uint32_t* reg_low); +cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low); void -cpu_wrmsr(uint32_t msr_idx, uint32_t reg_high, uint32_t reg_low); +cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low); #endif \ No newline at end of file