X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/76175f34b86c84044cd2b944a581575ade056f7b..9b840d9c5c0db5e621e475dc8414edd98497ed36:/lunaix-os/arch/aarch64/includes/asm/aa64_msrs.h diff --git a/lunaix-os/arch/aarch64/includes/asm/aa64_msrs.h b/lunaix-os/arch/aarch64/includes/asm/aa64_msrs.h new file mode 100644 index 0000000..cd8978d --- /dev/null +++ b/lunaix-os/arch/aarch64/includes/asm/aa64_msrs.h @@ -0,0 +1,77 @@ +#ifndef __LUNAIX_AA64_MSRS_H +#define __LUNAIX_AA64_MSRS_H + +#include + +#define __sr_encode(op0, op1, crn, crm, op2) \ + s##op0##_##op1##_c##crn##_c##crm##_##op2 + +#define SCTLR_EL1 __sr_encode(3, 0, 1, 0, 0) +#define TCR_EL1 __sr_encode(3, 0, 2, 0, 2) +#define TTBR0_EL1 __sr_encode(3, 0, 2, 0, 0) +#define TTBR1_EL1 __sr_encode(3, 0, 2, 0, 1) +#define VBAR_EL1 __sr_encode(3, 0, 12, 0, 1) +#define CurrentEL __sr_encode(3, 0, 4, 2, 2) +#define ELR_E1 __sr_encode(3, 0, 4, 0, 1) +#define SPSel __sr_encode(3, 0, 4, 2, 0) +#define SPSR_EL1 __sr_encode(3, 0, 4, 0, 0) +#define DAIF_EL1 __sr_encode(3, 3, 4, 2, 1) +#define ALLINT_EL1 __sr_encode(3, 0, 4, 3, 0) +#define SP_EL0 __sr_encode(3, 0, 4, 1, 0) +#define SP_EL1 __sr_encode(3, 4, 4, 1, 0) + +#define read_sysreg(reg) \ + ({ unsigned long _x; \ + asm ("mrs %0, " stringify(reg):"=r"(_x)); \ + _x; \ + }) + +#define set_sysreg(reg, v) \ + ({ unsigned long _x = v; \ + asm ("msr " stringify(reg) ", %0"::"r"(_x)); \ + _x; \ + }) + +#define SCTRL_SPINTMASK (1UL << 62) +#define SCTRL_NMI (1UL << 61) +#define SCTRL_EE (1UL << 25) +#define SCTRL_E0E (1UL << 24) +#define SCTRL_WXN (1UL << 19) +#define SCTRL_nAA (1UL << 6) +#define SCTRL_SA0 (1UL << 4) +#define SCTRL_SA (1UL << 3) +#define SCTRL_A (1UL << 1) +#define SCTRL_M (1UL << 0) + +#define TCR_DS (1UL << 59) +#define TCR_E0PD1 (1UL << 56) +#define TCR_E0PD0 (1UL << 55) +#define TCR_TBID1 (1UL << 52) +#define TCR_TBID0 (1UL << 51) +#define TCR_HPD1 (1UL << 42) +#define TCR_HPD0 (1UL << 41) +#define TCR_HD (1UL << 40) +#define TCR_HA (1UL << 39) +#define TCR_TBI1 (1UL << 38) +#define TCR_TBI0 (1UL << 37) +#define TCR_AS (1UL << 36) + +#define TCR_G4K (0b01) +#define TCR_G16K (0b10) +#define TCR_G64K (0b11) + +#define TCR_SHNS (0b01) +#define TCR_SHOS (0b10) +#define TCR_SHIS (0b11) + +#define TCR_TG1(g) (((g) & 0b11) << 30) +#define TCR_TG0(g) (((g) & 0b11) << 14) + +#define TCR_T1SZ(sz) (((sz) & 0b111111) << 16) +#define TCR_T0SZ(sz) (((sz) & 0b111111)) + +#define TCR_EPD1 (1UL << 23) +#define TCR_EPD0 (1UL << 7) +#define TCR_A1 (1UL << 22) + +#endif /* __LUNAIX_AA64_MSRS_H */