X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/9fe5e02cf615ad121c4460fbaaac2787d1e09c0e..2a49908006b177c4d6354309333d06b1b96e4887:/lunaix-os/includes/hal/cpu.h

diff --git a/lunaix-os/includes/hal/cpu.h b/lunaix-os/includes/hal/cpu.h
index 6381143..93805d8 100644
--- a/lunaix-os/includes/hal/cpu.h
+++ b/lunaix-os/includes/hal/cpu.h
@@ -1,12 +1,15 @@
 #ifndef __LUNAIX_CPU_H
 #define __LUNAIX_CPU_H
 
-#include <stdint.h>
+#include <lunaix/types.h>
+
+#define SEL_RPL(selector) ((selector)&0x3)
 
 typedef unsigned int reg32;
 typedef unsigned short reg16;
 
-typedef struct {
+typedef struct
+{
     reg32 eax;
     reg32 ebx;
     reg32 ecx;
@@ -15,58 +18,115 @@ typedef struct {
     reg32 ebp;
     reg32 esi;
     reg32 esp;
-    reg32 cs;
-    reg32 eip;
-} __attribute__((packed)) registers;
+} __attribute__((packed)) gp_regs;
+
+typedef struct
+{
+    reg16 ds;
+    reg16 es;
+    reg16 fs;
+    reg16 gs;
+} __attribute__((packed)) sg_reg;
+
+void
+cpu_get_brand(char* brand_out);
+
+int
+cpu_has_apic();
 
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wreturn-type"
-static inline reg32 cpu_rcr0() {
-    asm volatile ("mov %cr0, %eax");
+static inline reg32
+cpu_rcr0()
+{
+    ptr_t val;
+    asm volatile("movl %%cr0,%0" : "=r"(val));
+    return val;
 }
 
-static inline reg32 cpu_rcr2() {
-    asm volatile ("mov %cr2, %eax");
+static inline reg32
+cpu_rcr2()
+{
+    ptr_t val;
+    asm volatile("movl %%cr2,%0" : "=r"(val));
+    return val;
 }
 
-static inline reg32 cpu_rcr3() {
-    asm volatile ("mov %cr3, %eax");
+static inline reg32
+cpu_rcr3()
+{
+    ptr_t val;
+    asm volatile("movl %%cr3,%0" : "=r"(val));
+    return val;
+}
+
+static inline reg32
+cpu_reflags()
+{
+    ptr_t val;
+    asm volatile("pushf\n"
+                 "popl %0\n"
+                 : "=r"(val)::);
+    return val;
 }
 #pragma GCC diagnostic pop
 
-static inline void cpu_lcr0(reg32 v) {
-    asm volatile (
-        "mov %0, %%cr0"
-        :: "r"(v)
-    );
+static inline void
+cpu_lcr0(reg32 v)
+{
+    asm("mov %0, %%cr0" ::"r"(v));
+}
+
+static inline void
+cpu_lcr2(reg32 v)
+{
+    asm("mov %0, %%cr2" ::"r"(v));
+}
+
+static inline void
+cpu_lcr3(reg32 v)
+{
+    asm("mov %0, %%cr3" ::"r"(v));
 }
 
-static inline void cpu_lcr2(reg32 v) {
-    asm volatile (
-        "mov %0, %%cr2"
-        :: "r"(v)
-    );
+static inline void
+cpu_invplg(ptr_t va)
+{
+    asm volatile("invlpg (%0)" ::"r"(va) : "memory");
 }
 
-static inline void cpu_lcr3(reg32 v) {
-    asm volatile (
-        "mov %0, %%cr3"
-        :: "r"(v)
-    );
+static inline void
+cpu_enable_interrupt()
+{
+    asm volatile("sti");
 }
 
-static inline void cpu_invplg(void* va) {
-    __asm__("invlpg (%0)" ::"r"((uintptr_t)va) : "memory");
+static inline void
+cpu_disable_interrupt()
+{
+    asm volatile("cli");
 }
 
-static inline void cpu_invtlb() {
+static inline void
+cpu_invtlb()
+{
     reg32 interm;
-    __asm__(
-        "movl %%cr3, %0\n"
+    asm("movl %%cr3, %0\n"
         "movl %0, %%cr3"
-        :"=r"(interm)
-        :"r"(interm)
-    );
+        : "=r"(interm)
+        : "r"(interm));
 }
 
+static inline void
+cpu_int(int vect)
+{
+    asm("int %0" ::"i"(vect));
+}
+
+void
+cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low);
+
+void
+cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low);
+
 #endif
\ No newline at end of file