X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/b60166b327a9108b07e3069fa6568a451529ffd9..69777bdcab284335651a8002e2896f3862fa423d:/lunaix-os/arch/i386/includes/sys/mm/mm_defs.h

diff --git a/lunaix-os/arch/i386/includes/sys/mm/mm_defs.h b/lunaix-os/arch/i386/includes/sys/mm/mm_defs.h
index 8f51352..8dd7df6 100644
--- a/lunaix-os/arch/i386/includes/sys/mm/mm_defs.h
+++ b/lunaix-os/arch/i386/includes/sys/mm/mm_defs.h
@@ -2,12 +2,32 @@
 #define __LUNAIX_MM_DEFS_H
 
 #include "mempart.h"
+#include "pagetable.h"
 
-#define KSTACK_SIZE (3 * MEM_PAGE)
+#define KSTACK_PAGES            3
+#define KSTACK_SIZE             (KSTACK_PAGES * MEM_PAGE)
 
-#define MEMGUARD 0xdeadc0deUL
+/*
+    Regardless architecture we need to draw the line very carefully, and must 
+    take the size of VM into account. In general, we aims to achieve 
+    "sufficiently large" of memory for kernel
 
-#define kernel_addr(addr) ((addr) >= KERNEL_EXEC)
-#define guardian_page(pte) ((pte) == MEMGUARD)
+    In terms of x86_32:
+        * #768~1022 PTEs of PD      (0x00000000c0000000, ~1GiB)
+    
+    In light of upcomming x86_64 support (for Level 4&5 Paging):
+        * #510 entry of PML4        (0x0000ff0000000000, ~512GiB)
+        * #510 entry of PML5        (0x01fe000000000000, ~256TiB)
+*/
+// Where the kernel getting re-mapped.
+#define KERNEL_RESIDENT         0xc0000000UL
+
+// Pages reserved for kernel image
+#define KEXEC_RSVD              16
+
+#define kernel_addr(addr)       ((addr) >= KERNEL_RESIDENT || (addr) < USR_EXEC)
+
+#define to_kphysical(k_va)      ((ptr_t)(k_va) - KERNEL_RESIDENT)
+#define to_kvirtual(k_pa)       ((ptr_t)(k_pa) - KERNEL_RESIDENT)
 
 #endif /* __LUNAIX_MM_DEFS_H */