X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/bb7ce16533fb6c1384775dea6e1150e74c229daf..d96f52f65ecb90e26be9bd709fbdb1de54795db1:/lunaix-os/hal/pci.c?ds=inline diff --git a/lunaix-os/hal/pci.c b/lunaix-os/hal/pci.c index ca31e21..aa6acd1 100644 --- a/lunaix-os/hal/pci.c +++ b/lunaix-os/hal/pci.c @@ -56,13 +56,14 @@ pci_probe_device(int bus, int dev, int funct) pci_reg_t intr = pci_read_cspace(base, 0x3c); pci_reg_t class = pci_read_cspace(base, 0x8); - struct pci_device* device = valloc(sizeof(struct pci_device)); + struct pci_device* device = vzalloc(sizeof(struct pci_device)); *device = (struct pci_device){ .cspace_base = base, .class_info = class, .device_info = reg1, .intr_info = intr }; pci_probe_msi_info(device); + pci_probe_bar_info(device); llist_append(&pci_devices, &device->dev_chain); } @@ -79,6 +80,24 @@ pci_probe() } } +void +pci_probe_bar_info(struct pci_device* device) +{ + uint32_t bar; + struct pci_base_addr* ba; + for (size_t i = 0; i < 6; i++) { + ba = &device->bar[i]; + ba->size = pci_bar_sizing(device, &bar, i + 1); + if (PCI_BAR_MMIO(bar)) { + ba->start = PCI_BAR_ADDR_MM(bar); + ba->type |= PCI_BAR_CACHEABLE(bar) ? BAR_TYPE_CACHABLE : 0; + ba->type |= BAR_TYPE_MMIO; + } else { + ba->start = PCI_BAR_ADDR_IO(bar); + } + } +} + void pci_probe_msi_info(struct pci_device* device) { @@ -107,23 +126,69 @@ pci_probe_msi_info(struct pci_device* device) } } -#define PCI_PRINT_BAR_LISTING +void +__pci_read_cspace(struct twimap* map) +{ + struct pci_device* pcidev = (struct pci_device*)(map->data); -int -__pci_read_cspace(struct v_inode* inode, void* buffer, size_t len, size_t fpos) + for (size_t i = 0; i < 256; i += sizeof(pci_reg_t)) { + *(pci_reg_t*)(map->buffer + i) = + pci_read_cspace(pcidev->cspace_base, i); + } + + map->size_acc = 256; +} + +void +__pci_read_revid(struct twimap* map) +{ + int class = twimap_data(map, struct pci_device*)->class_info; + twimap_printf(map, "0x%x", PCI_DEV_REV(class)); +} + +void +__pci_read_class(struct twimap* map) { - if (len < 256) { - return ERANGE; + int class = twimap_data(map, struct pci_device*)->class_info; + twimap_printf(map, "0x%x", PCI_DEV_CLASS(class)); +} + +void +__pci_bar_read(struct twimap* map) +{ + struct pci_device* pcidev = twimap_data(map, struct pci_device*); + int bar_index = twimap_index(map, int); + + struct pci_base_addr* bar = &pcidev->bar[bar_index]; + + if (!bar->start && !bar->size) { + twimap_printf(map, "[%d] not present \n", bar_index); + return; } - struct twifs_node* node = (struct twifs_node*)(inode->data); - struct pci_device* pcidev = (struct pci_device*)(node->data); + twimap_printf( + map, "[%d] base=%.8p, size=%.8p, ", bar_index, bar->start, bar->size); - for (size_t i = 0; i < 256; i += sizeof(pci_reg_t)) { - *(pci_reg_t*)(buffer + i) = pci_read_cspace(pcidev->cspace_base, i); + if ((bar->type & BAR_TYPE_MMIO)) { + twimap_printf(map, "mmio"); + if ((bar->type & BAR_TYPE_CACHABLE)) { + twimap_printf(map, ", prefetchable"); + } + } else { + twimap_printf(map, "io"); } - return 256; + twimap_printf(map, "\n"); +} + +int +__pci_bar_gonext(struct twimap* map) +{ + if (twimap_index(map, int) >= 5) { + return 0; + } + map->index += 1; + return 1; } void @@ -131,18 +196,29 @@ pci_build_fsmapping() { struct twifs_node *pci_class = twifs_dir_node(NULL, "pci"), *pci_dev; struct pci_device *pos, *n; + struct twimap* map; llist_for_each(pos, n, &pci_devices, dev_chain) { pci_dev = twifs_dir_node(pci_class, - "B%d:D%d:F%d.%x:%x", + "%.2d:%.2d:%.2d.%.4x:%.4x", PCI_BUS_NUM(pos->cspace_base), PCI_SLOT_NUM(pos->cspace_base), PCI_FUNCT_NUM(pos->cspace_base), PCI_DEV_VENDOR(pos->device_info), PCI_DEV_DEVID(pos->device_info)); - struct twifs_node* fnode = twifs_file_node(pci_dev, "cspace"); - fnode->data = pos; - fnode->ops.read = __pci_read_cspace; + + map = twifs_mapping(pci_dev, pos, "config"); + map->read = __pci_read_cspace; + + map = twifs_mapping(pci_dev, pos, "revision"); + map->read = __pci_read_revid; + + map = twifs_mapping(pci_dev, pos, "class"); + map->read = __pci_read_class; + + map = twifs_mapping(pci_dev, pos, "io_bases"); + map->read = __pci_bar_read; + map->go_next = __pci_bar_gonext; } }