X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/cd09c4b222e4ddf45a42522563ae2471a829d1c8..9fe5e02cf615ad121c4460fbaaac2787d1e09c0e:/lunaix-os/includes/hal/io.h?ds=sidebyside diff --git a/lunaix-os/includes/hal/io.h b/lunaix-os/includes/hal/io.h index 0f5e9d6..cbcf2bd 100644 --- a/lunaix-os/includes/hal/io.h +++ b/lunaix-os/includes/hal/io.h @@ -3,39 +3,76 @@ #include -void io_port_wb(uint8_t port, uint8_t value) { - asm volatile ( - "movb %0, %%al\n" - "movb %1, %%dx\n" - "out %%al, %%dx\n" - :: "r"(value) "r"(port) - ); -} - -void io_port_wl(uint8_t port, uint32_t value) { - asm volatile ( - "movl %0, %%eax\n" - "movb %1, %%dx\n" - "out %%eax, %%dx\n" - :: "r"(value) "r"(port) - ); -} - -uint8_t io_port_rb(uint8_t port) { - asm volatile ( - "movb $0, %%eax\n" - "movb %0, %%dx\n" - "in %%dx, %%al\n" - :: "r"(port) - ); -} - -uint32_t io_port_rl(uint8_t port) { - asm volatile ( - "movb %0, %%dx\n" - "in %%dx, %%eax\n" - :: "r"(port) - ); +static inline uint8_t io_inb(int port) { + uint8_t data; + asm volatile("inb %w1,%0" : "=a" (data) : "d" (port)); + return data; +} + +static inline void io_insb(int port, void* addr, int cnt) { + asm volatile("cld\n\trepne\n\tinsb" + : "=D" (addr), "=c" (cnt) + : "d" (port), "0" (addr), "1" (cnt) + : "memory", "cc"); +} + +static inline uint16_t io_inw(int port) { + uint16_t data; + asm volatile("inw %w1,%0" : "=a" (data) : "d" (port)); + return data; +} + +static inline void io_insw(int port, void* addr, int cnt) { + asm volatile("cld\n\trepne\n\tinsw" + : "=D" (addr), "=c" (cnt) + : "d" (port), "0" (addr), "1" (cnt) + : "memory", "cc"); +} + +static inline uint32_t io_inl(int port) { + uint32_t data; + asm volatile("inl %w1,%0" : "=a" (data) : "d" (port)); + return data; +} + +static inline void io_insl(int port, void* addr, int cnt) { + asm volatile("cld\n\trepne\n\tinsl" + : "=D" (addr), "=c" (cnt) + : "d" (port), "0" (addr), "1" (cnt) + : "memory", "cc"); +} + +static inline void io_outb(int port, uint8_t data) { + asm volatile("outb %0,%w1" : : "a" (data), "d" (port)); +} + +static inline void io_outsb(int port, const void* addr, int cnt) { + asm volatile("cld\n\trepne\n\toutsb" + : "=S" (addr), "=c" (cnt) + : "d" (port), "0" (addr), "1" (cnt) + : "cc"); +} + +static inline void io_outw(int port, uint16_t data) { + asm volatile("outw %0,%w1" : : "a" (data), "d" (port)); +} + +static inline void io_outsw(int port, const void* addr, int cnt) { + asm volatile("cld\n\trepne\n\toutsw" + : "=S" (addr), "=c" (cnt) + : "d" (port), "0" (addr), "1" (cnt) + : "cc"); +} + +static inline void io_outsl(int port, const void* addr, int cnt) { + asm volatile("cld\n\trepne\n\toutsl" + : "=S" (addr), "=c" (cnt) + : "d" (port), "0" (addr), "1" (cnt) + : "cc"); +} + +static inline void io_outl(int port, uint32_t data) { + asm volatile("outl %0,%w1" : : "a" (data), "d" (port)); } #endif /* __LUNAIX_IO_H */