X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/cd09c4b222e4ddf45a42522563ae2471a829d1c8..af8e873ae38b72a56a89485c62bb5ccd22a9f8a7:/lunaix-os/hal/cpu.c?ds=sidebyside diff --git a/lunaix-os/hal/cpu.c b/lunaix-os/hal/cpu.c index b2ef657..ab5432c 100644 --- a/lunaix-os/hal/cpu.c +++ b/lunaix-os/hal/cpu.c @@ -4,7 +4,7 @@ void cpu_get_model(char* model_out) { uint32_t* out = (uint32_t*)model_out; - reg32 eax, ebx, edx, ecx; + reg32 eax = 0, ebx = 0, edx = 0, ecx = 0; __get_cpuid(0, &eax, &ebx, &ecx, &edx); @@ -27,7 +27,7 @@ void cpu_get_brand(char* brand_out) { brand_out[1] = '\0'; } uint32_t* out = (uint32_t*) brand_out; - reg32 eax, ebx, edx, ecx; + reg32 eax = 0, ebx = 0, edx = 0, ecx = 0; for (uint32_t i = 2, j = 0; i < 5; i++) { __get_cpuid(BRAND_LEAF + i, &eax, &ebx, &ecx, &edx); @@ -40,37 +40,28 @@ void cpu_get_brand(char* brand_out) { brand_out[48] = '\0'; } -reg32 cpu_r_cr0() { - asm volatile ("mov %cr0, %eax"); -} - -reg32 cpu_r_cr2() { - asm volatile ("mov %cr2, %eax"); -} - -reg32 cpu_r_cr3() { - asm volatile ("mov %cr3, %eax"); -} -void cpu_w_cr0(reg32 v) { - asm volatile ( - "mov %0, %%cr0" - :: "r"(v) - ); +int +cpu_has_apic() { + // reference: Intel manual, section 10.4.2 + reg32 eax = 0, ebx = 0, edx = 0, ecx = 0; + __get_cpuid(1, &eax, &ebx, &ecx, &edx); + + return (edx & 0x100); } -void cpu_w_cr2(reg32 v) { - asm volatile ( - "mov %0, %%cr2" - :: "r"(v) - ); -} +void +cpu_rdmsr(uint32_t msr_idx, uint32_t* reg_high, uint32_t* reg_low) +{ + uint32_t h = 0, l = 0; + asm volatile("rdmsr" : "=d"(h), "=a"(l) : "c"(msr_idx)); -void cpu_w_cr3(reg32 v) { - asm volatile ( - "mov %0, %%cr3" - :: "r"(v) - ); + *reg_high = h; + *reg_low = l; } - +void +cpu_wrmsr(uint32_t msr_idx, uint32_t reg_high, uint32_t reg_low) +{ + asm volatile("wrmsr" : : "d"(reg_high), "a"(reg_low), "c"(msr_idx)); +} \ No newline at end of file