X-Git-Url: https://scm.lunaixsky.com/lunaix-os.git/blobdiff_plain/e8e64a4f1d76aaeac3defa13243505cccd25c078..bc34fd00d2e81fbc890bb2060ed6693454a230bf:/lunaix-os/includes/hal/pci.h

diff --git a/lunaix-os/includes/hal/pci.h b/lunaix-os/includes/hal/pci.h
index b31352b..57c04ca 100644
--- a/lunaix-os/includes/hal/pci.h
+++ b/lunaix-os/includes/hal/pci.h
@@ -34,7 +34,12 @@
 #define PCI_BAR_ADDR_IO(x) ((x) & ~0x3)
 
 #define PCI_MSI_ADDR(msi_base) ((msi_base) + 4)
-#define PCI_MSI_DATA(msi_base) ((msi_base) + 8)
+#define PCI_MSI_DATA(msi_base, offset) ((msi_base) + 8 + offset)
+#define PCI_MSI_MASK(msi_base, offset) ((msi_base) + 0xc + offset)
+
+#define MSI_CAP_64BIT 0x80
+#define MSI_CAP_MASK 0x100
+#define MSI_CAP_ENABLE 0x1
 
 #define PCI_RCMD_DISABLE_INTR (1 << 10)
 #define PCI_RCMD_FAST_B2B (1 << 9)
@@ -64,14 +69,14 @@ struct pci_device
 // PCI Configuration Space (C-Space) r/w:
 //      Refer to "PCI Local Bus Specification, Rev.3, Section 3.2.2.3.2"
 
-inline pci_reg_t
+static inline pci_reg_t
 pci_read_cspace(uint32_t base, int offset)
 {
     io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));
     return io_inl(PCI_CONFIG_DATA);
 }
 
-inline void
+static inline void
 pci_write_cspace(uint32_t base, int offset, pci_reg_t data)
 {
     io_outl(PCI_CONFIG_ADDR, base | (offset & ~0x3));