From de334342a8a134a7c5b15e175d1c2ff87e6dbb2a Mon Sep 17 00:00:00 2001
From: Minep <zelong56@gmail.com>
Date: Sat, 17 Sep 2022 14:08:47 +0100
Subject: [PATCH 1/1] refactor: script to generate code for interrupt
 installation

---
 lunaix-os/includes/arch/x86/idt.h        |   6 +-
 lunaix-os/includes/arch/x86/interrupts.h |  44 ----
 lunaix-os/includes/arch/x86/intrhnds.h   | 261 +++++++++++++++++++++
 lunaix-os/kernel/asm/x86/idt.c           |  68 ------
 lunaix-os/kernel/asm/x86/interrupt.S     |  30 +--
 lunaix-os/kernel/asm/x86/intrhnds.S      | 269 ++++++++++++++++++++++
 lunaix-os/kernel/asm/x86/intrhnds.c      | 280 +++++++++++++++++++++++
 lunaix-os/scripts/x86_idt_generator.py   | 147 ++++++++++++
 8 files changed, 961 insertions(+), 144 deletions(-)
 create mode 100644 lunaix-os/includes/arch/x86/intrhnds.h
 delete mode 100644 lunaix-os/kernel/asm/x86/idt.c
 create mode 100644 lunaix-os/kernel/asm/x86/intrhnds.S
 create mode 100644 lunaix-os/kernel/asm/x86/intrhnds.c
 create mode 100644 lunaix-os/scripts/x86_idt_generator.py

diff --git a/lunaix-os/includes/arch/x86/idt.h b/lunaix-os/includes/arch/x86/idt.h
index 9b48eea..0d515c2 100644
--- a/lunaix-os/includes/arch/x86/idt.h
+++ b/lunaix-os/includes/arch/x86/idt.h
@@ -1,8 +1,8 @@
 #ifndef __LUNAIX_IDT_H
 #define __LUNAIX_IDT_H
-#define IDT_TRAP        0x78
-#define IDT_INTERRUPT   0x70
-#define IDT_ATTR(dpl, type)                   (((type) << 5) | ((dpl & 3) << 13) | (1 << 15))
+#define IDT_TRAP 0x78
+#define IDT_INTERRUPT 0x70
+#define IDT_ATTR(dpl, type) (((type) << 5) | ((dpl & 3) << 13) | (1 << 15))
 
 void
 _init_idt();
diff --git a/lunaix-os/includes/arch/x86/interrupts.h b/lunaix-os/includes/arch/x86/interrupts.h
index 3643a9e..70e7149 100644
--- a/lunaix-os/includes/arch/x86/interrupts.h
+++ b/lunaix-os/includes/arch/x86/interrupts.h
@@ -34,50 +34,6 @@ typedef struct
 
 typedef void (*int_subscriber)(const isr_param*);
 
-#pragma region ISR_DECLARATION
-
-#define ISR(iv) void _asm_isr##iv();
-
-ISR(0)
-ISR(1)
-ISR(2)
-ISR(3)
-ISR(4)
-ISR(5)
-ISR(6)
-ISR(7)
-ISR(8)
-ISR(9)
-ISR(10)
-ISR(11)
-ISR(12)
-ISR(13)
-ISR(14)
-ISR(15)
-ISR(16)
-ISR(17)
-ISR(18)
-ISR(19)
-ISR(20)
-ISR(21)
-
-ISR(32)
-ISR(33)
-ISR(34)
-
-ISR(201)
-ISR(202)
-
-ISR(210)
-
-ISR(250)
-ISR(251)
-ISR(252)
-ISR(253)
-ISR(254)
-
-#pragma endregion
-
 void
 intr_subscribe(const uint8_t vector, int_subscriber);
 
diff --git a/lunaix-os/includes/arch/x86/intrhnds.h b/lunaix-os/includes/arch/x86/intrhnds.h
new file mode 100644
index 0000000..266bfa8
--- /dev/null
+++ b/lunaix-os/includes/arch/x86/intrhnds.h
@@ -0,0 +1,261 @@
+
+#ifndef __LUNAIX_INTRHNDS_H
+#define __LUNAIX_INTRHNDS_H
+#define ISR(iv) void _asm_isr##iv();
+ISR(0)
+ISR(1)
+ISR(2)
+ISR(3)
+ISR(4)
+ISR(5)
+ISR(6)
+ISR(7)
+ISR(8)
+ISR(9)
+ISR(10)
+ISR(11)
+ISR(12)
+ISR(13)
+ISR(14)
+ISR(15)
+ISR(16)
+ISR(17)
+ISR(18)
+ISR(19)
+ISR(20)
+ISR(21)
+ISR(22)
+ISR(23)
+ISR(24)
+ISR(25)
+ISR(26)
+ISR(27)
+ISR(28)
+ISR(29)
+ISR(30)
+ISR(31)
+ISR(32)
+ISR(33)
+ISR(34)
+ISR(35)
+ISR(36)
+ISR(37)
+ISR(38)
+ISR(39)
+ISR(40)
+ISR(41)
+ISR(42)
+ISR(43)
+ISR(44)
+ISR(45)
+ISR(46)
+ISR(47)
+ISR(48)
+ISR(49)
+ISR(50)
+ISR(51)
+ISR(52)
+ISR(53)
+ISR(54)
+ISR(55)
+ISR(56)
+ISR(57)
+ISR(58)
+ISR(59)
+ISR(60)
+ISR(61)
+ISR(62)
+ISR(63)
+ISR(64)
+ISR(65)
+ISR(66)
+ISR(67)
+ISR(68)
+ISR(69)
+ISR(70)
+ISR(71)
+ISR(72)
+ISR(73)
+ISR(74)
+ISR(75)
+ISR(76)
+ISR(77)
+ISR(78)
+ISR(79)
+ISR(80)
+ISR(81)
+ISR(82)
+ISR(83)
+ISR(84)
+ISR(85)
+ISR(86)
+ISR(87)
+ISR(88)
+ISR(89)
+ISR(90)
+ISR(91)
+ISR(92)
+ISR(93)
+ISR(94)
+ISR(95)
+ISR(96)
+ISR(97)
+ISR(98)
+ISR(99)
+ISR(100)
+ISR(101)
+ISR(102)
+ISR(103)
+ISR(104)
+ISR(105)
+ISR(106)
+ISR(107)
+ISR(108)
+ISR(109)
+ISR(110)
+ISR(111)
+ISR(112)
+ISR(113)
+ISR(114)
+ISR(115)
+ISR(116)
+ISR(117)
+ISR(118)
+ISR(119)
+ISR(120)
+ISR(121)
+ISR(122)
+ISR(123)
+ISR(124)
+ISR(125)
+ISR(126)
+ISR(127)
+ISR(128)
+ISR(129)
+ISR(130)
+ISR(131)
+ISR(132)
+ISR(133)
+ISR(134)
+ISR(135)
+ISR(136)
+ISR(137)
+ISR(138)
+ISR(139)
+ISR(140)
+ISR(141)
+ISR(142)
+ISR(143)
+ISR(144)
+ISR(145)
+ISR(146)
+ISR(147)
+ISR(148)
+ISR(149)
+ISR(150)
+ISR(151)
+ISR(152)
+ISR(153)
+ISR(154)
+ISR(155)
+ISR(156)
+ISR(157)
+ISR(158)
+ISR(159)
+ISR(160)
+ISR(161)
+ISR(162)
+ISR(163)
+ISR(164)
+ISR(165)
+ISR(166)
+ISR(167)
+ISR(168)
+ISR(169)
+ISR(170)
+ISR(171)
+ISR(172)
+ISR(173)
+ISR(174)
+ISR(175)
+ISR(176)
+ISR(177)
+ISR(178)
+ISR(179)
+ISR(180)
+ISR(181)
+ISR(182)
+ISR(183)
+ISR(184)
+ISR(185)
+ISR(186)
+ISR(187)
+ISR(188)
+ISR(189)
+ISR(190)
+ISR(191)
+ISR(192)
+ISR(193)
+ISR(194)
+ISR(195)
+ISR(196)
+ISR(197)
+ISR(198)
+ISR(199)
+ISR(200)
+ISR(201)
+ISR(202)
+ISR(203)
+ISR(204)
+ISR(205)
+ISR(206)
+ISR(207)
+ISR(208)
+ISR(209)
+ISR(210)
+ISR(211)
+ISR(212)
+ISR(213)
+ISR(214)
+ISR(215)
+ISR(216)
+ISR(217)
+ISR(218)
+ISR(219)
+ISR(220)
+ISR(221)
+ISR(222)
+ISR(223)
+ISR(224)
+ISR(225)
+ISR(226)
+ISR(227)
+ISR(228)
+ISR(229)
+ISR(230)
+ISR(231)
+ISR(232)
+ISR(233)
+ISR(234)
+ISR(235)
+ISR(236)
+ISR(237)
+ISR(238)
+ISR(239)
+ISR(240)
+ISR(241)
+ISR(242)
+ISR(243)
+ISR(244)
+ISR(245)
+ISR(246)
+ISR(247)
+ISR(248)
+ISR(249)
+ISR(250)
+ISR(251)
+ISR(252)
+ISR(253)
+ISR(254)
+ISR(255)
+#endif
diff --git a/lunaix-os/kernel/asm/x86/idt.c b/lunaix-os/kernel/asm/x86/idt.c
deleted file mode 100644
index e8b9524..0000000
--- a/lunaix-os/kernel/asm/x86/idt.c
+++ /dev/null
@@ -1,68 +0,0 @@
-#include <arch/x86/idt.h>
-#include <arch/x86/interrupts.h>
-#include <stdint.h>
-
-#define IDT_ENTRY 256
-
-uint64_t _idt[IDT_ENTRY];
-uint16_t _idt_limit = sizeof(_idt) - 1;
-
-static inline void
-_set_idt_entry(uint32_t vector,
-               uint16_t seg_selector,
-               void (*isr)(),
-               uint8_t dpl,
-               uint8_t type)
-{
-    uintptr_t offset = (uintptr_t)isr;
-    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl, type);
-    _idt[vector] <<= 32;
-    _idt[vector] |= (seg_selector << 16) | (offset & 0x0000ffff);
-}
-
-void
-_set_idt_intr_entry(uint32_t vector,
-                    uint16_t seg_selector,
-                    void (*isr)(),
-                    uint8_t dpl)
-{
-    _set_idt_entry(vector, seg_selector, isr, dpl, IDT_INTERRUPT);
-}
-
-void
-_set_idt_trap_entry(uint32_t vector,
-                    uint16_t seg_selector,
-                    void (*isr)(),
-                    uint8_t dpl)
-{
-    _set_idt_entry(vector, seg_selector, isr, dpl, IDT_TRAP);
-}
-
-void
-_init_idt()
-{
-    // CPU defined interrupts
-    _set_idt_intr_entry(FAULT_DIVISION_ERROR, 0x08, _asm_isr0, 0);
-    _set_idt_intr_entry(FAULT_GENERAL_PROTECTION, 0x08, _asm_isr13, 0);
-    _set_idt_intr_entry(FAULT_PAGE_FAULT, 0x08, _asm_isr14, 0);
-    _set_idt_intr_entry(FAULT_STACK_SEG_FAULT, 0x08, _asm_isr12, 0);
-
-    _set_idt_intr_entry(APIC_ERROR_IV, 0x08, _asm_isr250, 0);
-    _set_idt_intr_entry(APIC_LINT0_IV, 0x08, _asm_isr251, 0);
-    _set_idt_intr_entry(APIC_SPIV_IV, 0x08, _asm_isr252, 0);
-    _set_idt_intr_entry(APIC_TIMER_IV, 0x08, _asm_isr253, 0);
-
-    _set_idt_intr_entry(PC_KBD_IV, 0x08, _asm_isr201, 0);
-    _set_idt_intr_entry(AHCI_HBA_IV, 0x08, _asm_isr202, 0);
-
-    _set_idt_intr_entry(RTC_TIMER_IV, 0x08, _asm_isr210, 0);
-
-    // system defined interrupts
-    _set_idt_intr_entry(LUNAIX_SYS_PANIC, 0x08, _asm_isr32, 0);
-
-    // We make this a non-trap entry, and enable interrupt
-    // only when needed!
-    _set_idt_intr_entry(LUNAIX_SYS_CALL, 0x08, _asm_isr33, 3);
-
-    _set_idt_intr_entry(LUNAIX_SCHED, 0x08, _asm_isr34, 0);
-}
\ No newline at end of file
diff --git a/lunaix-os/kernel/asm/x86/interrupt.S b/lunaix-os/kernel/asm/x86/interrupt.S
index b4ce936..17236f8 100644
--- a/lunaix-os/kernel/asm/x86/interrupt.S
+++ b/lunaix-os/kernel/asm/x86/interrupt.S
@@ -4,17 +4,6 @@
 #include <lunaix/syscall.h>
 #define __ASM_INTR_DIAGNOSIS
 
-.macro isr_template vector, no_error_code=1
-    .global _asm_isr\vector
-    .type _asm_isr\vector, @function
-    _asm_isr\vector:
-        .if \no_error_code
-            pushl $0x0
-        .endif
-        pushl $\vector
-        jmp interrupt_wrapper
-.endm
-
 #ifdef __ASM_INTR_DIAGNOSIS
 .section .bss
     .global debug_resv
@@ -29,24 +18,7 @@
     tmp_stack:
 
 .section .text
-    isr_template FAULT_DIVISION_ERROR
-    isr_template FAULT_GENERAL_PROTECTION, no_error_code=0
-    isr_template FAULT_PAGE_FAULT, no_error_code=0
-    isr_template FAULT_STACK_SEG_FAULT, no_error_code=0
-
-    isr_template LUNAIX_SYS_PANIC
-    isr_template LUNAIX_SYS_CALL
-    isr_template LUNAIX_SCHED
-
-    isr_template APIC_ERROR_IV
-    isr_template APIC_LINT0_IV
-    isr_template APIC_TIMER_IV
-    isr_template APIC_SPIV_IV
-    isr_template RTC_TIMER_IV
-    
-    isr_template PC_KBD_IV
-    isr_template AHCI_HBA_IV
-
+    .global interrupt_wrapper
     interrupt_wrapper:
         /*
          Stack layout (layout of struct isr_param)
diff --git a/lunaix-os/kernel/asm/x86/intrhnds.S b/lunaix-os/kernel/asm/x86/intrhnds.S
new file mode 100644
index 0000000..d8127ec
--- /dev/null
+++ b/lunaix-os/kernel/asm/x86/intrhnds.S
@@ -0,0 +1,269 @@
+
+#define __ASM__
+.macro isr_template vector, no_error_code=1
+    .global _asm_isr\vector
+    .type _asm_isr\vector, @function
+    _asm_isr\vector:
+        .if \no_error_code
+            pushl $0x0
+        .endif
+        pushl $\vector
+        jmp interrupt_wrapper
+.endm
+.section .text
+    isr_template 0, no_error_code=1
+    isr_template 1, no_error_code=1
+    isr_template 2, no_error_code=1
+    isr_template 3, no_error_code=1
+    isr_template 4, no_error_code=1
+    isr_template 5, no_error_code=1
+    isr_template 6, no_error_code=1
+    isr_template 7, no_error_code=1
+    isr_template 8, no_error_code=0
+    isr_template 9, no_error_code=1
+    isr_template 10, no_error_code=0
+    isr_template 11, no_error_code=0
+    isr_template 12, no_error_code=0
+    isr_template 13, no_error_code=0
+    isr_template 14, no_error_code=0
+    isr_template 15, no_error_code=1
+    isr_template 16, no_error_code=1
+    isr_template 17, no_error_code=0
+    isr_template 18, no_error_code=1
+    isr_template 19, no_error_code=1
+    isr_template 20, no_error_code=1
+    isr_template 21, no_error_code=1
+    isr_template 22, no_error_code=1
+    isr_template 23, no_error_code=1
+    isr_template 24, no_error_code=1
+    isr_template 25, no_error_code=1
+    isr_template 26, no_error_code=1
+    isr_template 27, no_error_code=1
+    isr_template 28, no_error_code=1
+    isr_template 29, no_error_code=1
+    isr_template 30, no_error_code=1
+    isr_template 31, no_error_code=1
+    isr_template 32, no_error_code=1
+    isr_template 33, no_error_code=1
+    isr_template 34, no_error_code=1
+    isr_template 35, no_error_code=1
+    isr_template 36, no_error_code=1
+    isr_template 37, no_error_code=1
+    isr_template 38, no_error_code=1
+    isr_template 39, no_error_code=1
+    isr_template 40, no_error_code=1
+    isr_template 41, no_error_code=1
+    isr_template 42, no_error_code=1
+    isr_template 43, no_error_code=1
+    isr_template 44, no_error_code=1
+    isr_template 45, no_error_code=1
+    isr_template 46, no_error_code=1
+    isr_template 47, no_error_code=1
+    isr_template 48, no_error_code=1
+    isr_template 49, no_error_code=1
+    isr_template 50, no_error_code=1
+    isr_template 51, no_error_code=1
+    isr_template 52, no_error_code=1
+    isr_template 53, no_error_code=1
+    isr_template 54, no_error_code=1
+    isr_template 55, no_error_code=1
+    isr_template 56, no_error_code=1
+    isr_template 57, no_error_code=1
+    isr_template 58, no_error_code=1
+    isr_template 59, no_error_code=1
+    isr_template 60, no_error_code=1
+    isr_template 61, no_error_code=1
+    isr_template 62, no_error_code=1
+    isr_template 63, no_error_code=1
+    isr_template 64, no_error_code=1
+    isr_template 65, no_error_code=1
+    isr_template 66, no_error_code=1
+    isr_template 67, no_error_code=1
+    isr_template 68, no_error_code=1
+    isr_template 69, no_error_code=1
+    isr_template 70, no_error_code=1
+    isr_template 71, no_error_code=1
+    isr_template 72, no_error_code=1
+    isr_template 73, no_error_code=1
+    isr_template 74, no_error_code=1
+    isr_template 75, no_error_code=1
+    isr_template 76, no_error_code=1
+    isr_template 77, no_error_code=1
+    isr_template 78, no_error_code=1
+    isr_template 79, no_error_code=1
+    isr_template 80, no_error_code=1
+    isr_template 81, no_error_code=1
+    isr_template 82, no_error_code=1
+    isr_template 83, no_error_code=1
+    isr_template 84, no_error_code=1
+    isr_template 85, no_error_code=1
+    isr_template 86, no_error_code=1
+    isr_template 87, no_error_code=1
+    isr_template 88, no_error_code=1
+    isr_template 89, no_error_code=1
+    isr_template 90, no_error_code=1
+    isr_template 91, no_error_code=1
+    isr_template 92, no_error_code=1
+    isr_template 93, no_error_code=1
+    isr_template 94, no_error_code=1
+    isr_template 95, no_error_code=1
+    isr_template 96, no_error_code=1
+    isr_template 97, no_error_code=1
+    isr_template 98, no_error_code=1
+    isr_template 99, no_error_code=1
+    isr_template 100, no_error_code=1
+    isr_template 101, no_error_code=1
+    isr_template 102, no_error_code=1
+    isr_template 103, no_error_code=1
+    isr_template 104, no_error_code=1
+    isr_template 105, no_error_code=1
+    isr_template 106, no_error_code=1
+    isr_template 107, no_error_code=1
+    isr_template 108, no_error_code=1
+    isr_template 109, no_error_code=1
+    isr_template 110, no_error_code=1
+    isr_template 111, no_error_code=1
+    isr_template 112, no_error_code=1
+    isr_template 113, no_error_code=1
+    isr_template 114, no_error_code=1
+    isr_template 115, no_error_code=1
+    isr_template 116, no_error_code=1
+    isr_template 117, no_error_code=1
+    isr_template 118, no_error_code=1
+    isr_template 119, no_error_code=1
+    isr_template 120, no_error_code=1
+    isr_template 121, no_error_code=1
+    isr_template 122, no_error_code=1
+    isr_template 123, no_error_code=1
+    isr_template 124, no_error_code=1
+    isr_template 125, no_error_code=1
+    isr_template 126, no_error_code=1
+    isr_template 127, no_error_code=1
+    isr_template 128, no_error_code=1
+    isr_template 129, no_error_code=1
+    isr_template 130, no_error_code=1
+    isr_template 131, no_error_code=1
+    isr_template 132, no_error_code=1
+    isr_template 133, no_error_code=1
+    isr_template 134, no_error_code=1
+    isr_template 135, no_error_code=1
+    isr_template 136, no_error_code=1
+    isr_template 137, no_error_code=1
+    isr_template 138, no_error_code=1
+    isr_template 139, no_error_code=1
+    isr_template 140, no_error_code=1
+    isr_template 141, no_error_code=1
+    isr_template 142, no_error_code=1
+    isr_template 143, no_error_code=1
+    isr_template 144, no_error_code=1
+    isr_template 145, no_error_code=1
+    isr_template 146, no_error_code=1
+    isr_template 147, no_error_code=1
+    isr_template 148, no_error_code=1
+    isr_template 149, no_error_code=1
+    isr_template 150, no_error_code=1
+    isr_template 151, no_error_code=1
+    isr_template 152, no_error_code=1
+    isr_template 153, no_error_code=1
+    isr_template 154, no_error_code=1
+    isr_template 155, no_error_code=1
+    isr_template 156, no_error_code=1
+    isr_template 157, no_error_code=1
+    isr_template 158, no_error_code=1
+    isr_template 159, no_error_code=1
+    isr_template 160, no_error_code=1
+    isr_template 161, no_error_code=1
+    isr_template 162, no_error_code=1
+    isr_template 163, no_error_code=1
+    isr_template 164, no_error_code=1
+    isr_template 165, no_error_code=1
+    isr_template 166, no_error_code=1
+    isr_template 167, no_error_code=1
+    isr_template 168, no_error_code=1
+    isr_template 169, no_error_code=1
+    isr_template 170, no_error_code=1
+    isr_template 171, no_error_code=1
+    isr_template 172, no_error_code=1
+    isr_template 173, no_error_code=1
+    isr_template 174, no_error_code=1
+    isr_template 175, no_error_code=1
+    isr_template 176, no_error_code=1
+    isr_template 177, no_error_code=1
+    isr_template 178, no_error_code=1
+    isr_template 179, no_error_code=1
+    isr_template 180, no_error_code=1
+    isr_template 181, no_error_code=1
+    isr_template 182, no_error_code=1
+    isr_template 183, no_error_code=1
+    isr_template 184, no_error_code=1
+    isr_template 185, no_error_code=1
+    isr_template 186, no_error_code=1
+    isr_template 187, no_error_code=1
+    isr_template 188, no_error_code=1
+    isr_template 189, no_error_code=1
+    isr_template 190, no_error_code=1
+    isr_template 191, no_error_code=1
+    isr_template 192, no_error_code=1
+    isr_template 193, no_error_code=1
+    isr_template 194, no_error_code=1
+    isr_template 195, no_error_code=1
+    isr_template 196, no_error_code=1
+    isr_template 197, no_error_code=1
+    isr_template 198, no_error_code=1
+    isr_template 199, no_error_code=1
+    isr_template 200, no_error_code=1
+    isr_template 201, no_error_code=1
+    isr_template 202, no_error_code=1
+    isr_template 203, no_error_code=1
+    isr_template 204, no_error_code=1
+    isr_template 205, no_error_code=1
+    isr_template 206, no_error_code=1
+    isr_template 207, no_error_code=1
+    isr_template 208, no_error_code=1
+    isr_template 209, no_error_code=1
+    isr_template 210, no_error_code=1
+    isr_template 211, no_error_code=1
+    isr_template 212, no_error_code=1
+    isr_template 213, no_error_code=1
+    isr_template 214, no_error_code=1
+    isr_template 215, no_error_code=1
+    isr_template 216, no_error_code=1
+    isr_template 217, no_error_code=1
+    isr_template 218, no_error_code=1
+    isr_template 219, no_error_code=1
+    isr_template 220, no_error_code=1
+    isr_template 221, no_error_code=1
+    isr_template 222, no_error_code=1
+    isr_template 223, no_error_code=1
+    isr_template 224, no_error_code=1
+    isr_template 225, no_error_code=1
+    isr_template 226, no_error_code=1
+    isr_template 227, no_error_code=1
+    isr_template 228, no_error_code=1
+    isr_template 229, no_error_code=1
+    isr_template 230, no_error_code=1
+    isr_template 231, no_error_code=1
+    isr_template 232, no_error_code=1
+    isr_template 233, no_error_code=1
+    isr_template 234, no_error_code=1
+    isr_template 235, no_error_code=1
+    isr_template 236, no_error_code=1
+    isr_template 237, no_error_code=1
+    isr_template 238, no_error_code=1
+    isr_template 239, no_error_code=1
+    isr_template 240, no_error_code=1
+    isr_template 241, no_error_code=1
+    isr_template 242, no_error_code=1
+    isr_template 243, no_error_code=1
+    isr_template 244, no_error_code=1
+    isr_template 245, no_error_code=1
+    isr_template 246, no_error_code=1
+    isr_template 247, no_error_code=1
+    isr_template 248, no_error_code=1
+    isr_template 249, no_error_code=1
+    isr_template 250, no_error_code=1
+    isr_template 251, no_error_code=1
+    isr_template 252, no_error_code=1
+    isr_template 253, no_error_code=1
+    isr_template 254, no_error_code=1
+    isr_template 255, no_error_code=1
diff --git a/lunaix-os/kernel/asm/x86/intrhnds.c b/lunaix-os/kernel/asm/x86/intrhnds.c
new file mode 100644
index 0000000..8aa0a72
--- /dev/null
+++ b/lunaix-os/kernel/asm/x86/intrhnds.c
@@ -0,0 +1,280 @@
+
+#include <arch/x86/idt.h>
+#include <stdint.h>
+#include <arch/x86/intrhnds.h>
+
+#define IDT_ENTRY 256
+
+uint64_t _idt[IDT_ENTRY];
+uint16_t _idt_limit = sizeof(_idt) - 1;
+static inline void
+_set_idt_entry(uint32_t vector,
+               uint16_t seg_selector,
+               void (*isr)(),
+               uint8_t dpl,
+               uint8_t type)
+{
+    uintptr_t offset = (uintptr_t)isr;
+    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl, type);
+    _idt[vector] <<= 32;
+    _idt[vector] |= (seg_selector << 16) | (offset & 0x0000ffff);
+}
+
+void _init_idt() {
+    _set_idt_entry(0, 8, _asm_isr0, 0, IDT_INTERRUPT);
+    _set_idt_entry(1, 8, _asm_isr1, 0, IDT_INTERRUPT);
+    _set_idt_entry(2, 8, _asm_isr2, 0, IDT_INTERRUPT);
+    _set_idt_entry(3, 8, _asm_isr3, 0, IDT_INTERRUPT);
+    _set_idt_entry(4, 8, _asm_isr4, 0, IDT_INTERRUPT);
+    _set_idt_entry(5, 8, _asm_isr5, 0, IDT_INTERRUPT);
+    _set_idt_entry(6, 8, _asm_isr6, 0, IDT_INTERRUPT);
+    _set_idt_entry(7, 8, _asm_isr7, 0, IDT_INTERRUPT);
+    _set_idt_entry(8, 8, _asm_isr8, 0, IDT_INTERRUPT);
+    _set_idt_entry(9, 8, _asm_isr9, 0, IDT_INTERRUPT);
+    _set_idt_entry(10, 8, _asm_isr10, 0, IDT_INTERRUPT);
+    _set_idt_entry(11, 8, _asm_isr11, 0, IDT_INTERRUPT);
+    _set_idt_entry(12, 8, _asm_isr12, 0, IDT_INTERRUPT);
+    _set_idt_entry(13, 8, _asm_isr13, 0, IDT_INTERRUPT);
+    _set_idt_entry(14, 8, _asm_isr14, 0, IDT_INTERRUPT);
+    _set_idt_entry(15, 8, _asm_isr15, 0, IDT_INTERRUPT);
+    _set_idt_entry(16, 8, _asm_isr16, 0, IDT_INTERRUPT);
+    _set_idt_entry(17, 8, _asm_isr17, 0, IDT_INTERRUPT);
+    _set_idt_entry(18, 8, _asm_isr18, 0, IDT_INTERRUPT);
+    _set_idt_entry(19, 8, _asm_isr19, 0, IDT_INTERRUPT);
+    _set_idt_entry(20, 8, _asm_isr20, 0, IDT_INTERRUPT);
+    _set_idt_entry(21, 8, _asm_isr21, 0, IDT_INTERRUPT);
+    _set_idt_entry(22, 8, _asm_isr22, 0, IDT_INTERRUPT);
+    _set_idt_entry(23, 8, _asm_isr23, 0, IDT_INTERRUPT);
+    _set_idt_entry(24, 8, _asm_isr24, 0, IDT_INTERRUPT);
+    _set_idt_entry(25, 8, _asm_isr25, 0, IDT_INTERRUPT);
+    _set_idt_entry(26, 8, _asm_isr26, 0, IDT_INTERRUPT);
+    _set_idt_entry(27, 8, _asm_isr27, 0, IDT_INTERRUPT);
+    _set_idt_entry(28, 8, _asm_isr28, 0, IDT_INTERRUPT);
+    _set_idt_entry(29, 8, _asm_isr29, 0, IDT_INTERRUPT);
+    _set_idt_entry(30, 8, _asm_isr30, 0, IDT_INTERRUPT);
+    _set_idt_entry(31, 8, _asm_isr31, 0, IDT_INTERRUPT);
+    _set_idt_entry(32, 8, _asm_isr32, 0, IDT_INTERRUPT);
+    _set_idt_entry(33, 8, _asm_isr33, 3, IDT_INTERRUPT);
+    _set_idt_entry(34, 8, _asm_isr34, 0, IDT_INTERRUPT);
+    _set_idt_entry(35, 8, _asm_isr35, 0, IDT_INTERRUPT);
+    _set_idt_entry(36, 8, _asm_isr36, 0, IDT_INTERRUPT);
+    _set_idt_entry(37, 8, _asm_isr37, 0, IDT_INTERRUPT);
+    _set_idt_entry(38, 8, _asm_isr38, 0, IDT_INTERRUPT);
+    _set_idt_entry(39, 8, _asm_isr39, 0, IDT_INTERRUPT);
+    _set_idt_entry(40, 8, _asm_isr40, 0, IDT_INTERRUPT);
+    _set_idt_entry(41, 8, _asm_isr41, 0, IDT_INTERRUPT);
+    _set_idt_entry(42, 8, _asm_isr42, 0, IDT_INTERRUPT);
+    _set_idt_entry(43, 8, _asm_isr43, 0, IDT_INTERRUPT);
+    _set_idt_entry(44, 8, _asm_isr44, 0, IDT_INTERRUPT);
+    _set_idt_entry(45, 8, _asm_isr45, 0, IDT_INTERRUPT);
+    _set_idt_entry(46, 8, _asm_isr46, 0, IDT_INTERRUPT);
+    _set_idt_entry(47, 8, _asm_isr47, 0, IDT_INTERRUPT);
+    _set_idt_entry(48, 8, _asm_isr48, 0, IDT_INTERRUPT);
+    _set_idt_entry(49, 8, _asm_isr49, 0, IDT_INTERRUPT);
+    _set_idt_entry(50, 8, _asm_isr50, 0, IDT_INTERRUPT);
+    _set_idt_entry(51, 8, _asm_isr51, 0, IDT_INTERRUPT);
+    _set_idt_entry(52, 8, _asm_isr52, 0, IDT_INTERRUPT);
+    _set_idt_entry(53, 8, _asm_isr53, 0, IDT_INTERRUPT);
+    _set_idt_entry(54, 8, _asm_isr54, 0, IDT_INTERRUPT);
+    _set_idt_entry(55, 8, _asm_isr55, 0, IDT_INTERRUPT);
+    _set_idt_entry(56, 8, _asm_isr56, 0, IDT_INTERRUPT);
+    _set_idt_entry(57, 8, _asm_isr57, 0, IDT_INTERRUPT);
+    _set_idt_entry(58, 8, _asm_isr58, 0, IDT_INTERRUPT);
+    _set_idt_entry(59, 8, _asm_isr59, 0, IDT_INTERRUPT);
+    _set_idt_entry(60, 8, _asm_isr60, 0, IDT_INTERRUPT);
+    _set_idt_entry(61, 8, _asm_isr61, 0, IDT_INTERRUPT);
+    _set_idt_entry(62, 8, _asm_isr62, 0, IDT_INTERRUPT);
+    _set_idt_entry(63, 8, _asm_isr63, 0, IDT_INTERRUPT);
+    _set_idt_entry(64, 8, _asm_isr64, 0, IDT_INTERRUPT);
+    _set_idt_entry(65, 8, _asm_isr65, 0, IDT_INTERRUPT);
+    _set_idt_entry(66, 8, _asm_isr66, 0, IDT_INTERRUPT);
+    _set_idt_entry(67, 8, _asm_isr67, 0, IDT_INTERRUPT);
+    _set_idt_entry(68, 8, _asm_isr68, 0, IDT_INTERRUPT);
+    _set_idt_entry(69, 8, _asm_isr69, 0, IDT_INTERRUPT);
+    _set_idt_entry(70, 8, _asm_isr70, 0, IDT_INTERRUPT);
+    _set_idt_entry(71, 8, _asm_isr71, 0, IDT_INTERRUPT);
+    _set_idt_entry(72, 8, _asm_isr72, 0, IDT_INTERRUPT);
+    _set_idt_entry(73, 8, _asm_isr73, 0, IDT_INTERRUPT);
+    _set_idt_entry(74, 8, _asm_isr74, 0, IDT_INTERRUPT);
+    _set_idt_entry(75, 8, _asm_isr75, 0, IDT_INTERRUPT);
+    _set_idt_entry(76, 8, _asm_isr76, 0, IDT_INTERRUPT);
+    _set_idt_entry(77, 8, _asm_isr77, 0, IDT_INTERRUPT);
+    _set_idt_entry(78, 8, _asm_isr78, 0, IDT_INTERRUPT);
+    _set_idt_entry(79, 8, _asm_isr79, 0, IDT_INTERRUPT);
+    _set_idt_entry(80, 8, _asm_isr80, 0, IDT_INTERRUPT);
+    _set_idt_entry(81, 8, _asm_isr81, 0, IDT_INTERRUPT);
+    _set_idt_entry(82, 8, _asm_isr82, 0, IDT_INTERRUPT);
+    _set_idt_entry(83, 8, _asm_isr83, 0, IDT_INTERRUPT);
+    _set_idt_entry(84, 8, _asm_isr84, 0, IDT_INTERRUPT);
+    _set_idt_entry(85, 8, _asm_isr85, 0, IDT_INTERRUPT);
+    _set_idt_entry(86, 8, _asm_isr86, 0, IDT_INTERRUPT);
+    _set_idt_entry(87, 8, _asm_isr87, 0, IDT_INTERRUPT);
+    _set_idt_entry(88, 8, _asm_isr88, 0, IDT_INTERRUPT);
+    _set_idt_entry(89, 8, _asm_isr89, 0, IDT_INTERRUPT);
+    _set_idt_entry(90, 8, _asm_isr90, 0, IDT_INTERRUPT);
+    _set_idt_entry(91, 8, _asm_isr91, 0, IDT_INTERRUPT);
+    _set_idt_entry(92, 8, _asm_isr92, 0, IDT_INTERRUPT);
+    _set_idt_entry(93, 8, _asm_isr93, 0, IDT_INTERRUPT);
+    _set_idt_entry(94, 8, _asm_isr94, 0, IDT_INTERRUPT);
+    _set_idt_entry(95, 8, _asm_isr95, 0, IDT_INTERRUPT);
+    _set_idt_entry(96, 8, _asm_isr96, 0, IDT_INTERRUPT);
+    _set_idt_entry(97, 8, _asm_isr97, 0, IDT_INTERRUPT);
+    _set_idt_entry(98, 8, _asm_isr98, 0, IDT_INTERRUPT);
+    _set_idt_entry(99, 8, _asm_isr99, 0, IDT_INTERRUPT);
+    _set_idt_entry(100, 8, _asm_isr100, 0, IDT_INTERRUPT);
+    _set_idt_entry(101, 8, _asm_isr101, 0, IDT_INTERRUPT);
+    _set_idt_entry(102, 8, _asm_isr102, 0, IDT_INTERRUPT);
+    _set_idt_entry(103, 8, _asm_isr103, 0, IDT_INTERRUPT);
+    _set_idt_entry(104, 8, _asm_isr104, 0, IDT_INTERRUPT);
+    _set_idt_entry(105, 8, _asm_isr105, 0, IDT_INTERRUPT);
+    _set_idt_entry(106, 8, _asm_isr106, 0, IDT_INTERRUPT);
+    _set_idt_entry(107, 8, _asm_isr107, 0, IDT_INTERRUPT);
+    _set_idt_entry(108, 8, _asm_isr108, 0, IDT_INTERRUPT);
+    _set_idt_entry(109, 8, _asm_isr109, 0, IDT_INTERRUPT);
+    _set_idt_entry(110, 8, _asm_isr110, 0, IDT_INTERRUPT);
+    _set_idt_entry(111, 8, _asm_isr111, 0, IDT_INTERRUPT);
+    _set_idt_entry(112, 8, _asm_isr112, 0, IDT_INTERRUPT);
+    _set_idt_entry(113, 8, _asm_isr113, 0, IDT_INTERRUPT);
+    _set_idt_entry(114, 8, _asm_isr114, 0, IDT_INTERRUPT);
+    _set_idt_entry(115, 8, _asm_isr115, 0, IDT_INTERRUPT);
+    _set_idt_entry(116, 8, _asm_isr116, 0, IDT_INTERRUPT);
+    _set_idt_entry(117, 8, _asm_isr117, 0, IDT_INTERRUPT);
+    _set_idt_entry(118, 8, _asm_isr118, 0, IDT_INTERRUPT);
+    _set_idt_entry(119, 8, _asm_isr119, 0, IDT_INTERRUPT);
+    _set_idt_entry(120, 8, _asm_isr120, 0, IDT_INTERRUPT);
+    _set_idt_entry(121, 8, _asm_isr121, 0, IDT_INTERRUPT);
+    _set_idt_entry(122, 8, _asm_isr122, 0, IDT_INTERRUPT);
+    _set_idt_entry(123, 8, _asm_isr123, 0, IDT_INTERRUPT);
+    _set_idt_entry(124, 8, _asm_isr124, 0, IDT_INTERRUPT);
+    _set_idt_entry(125, 8, _asm_isr125, 0, IDT_INTERRUPT);
+    _set_idt_entry(126, 8, _asm_isr126, 0, IDT_INTERRUPT);
+    _set_idt_entry(127, 8, _asm_isr127, 0, IDT_INTERRUPT);
+    _set_idt_entry(128, 8, _asm_isr128, 0, IDT_INTERRUPT);
+    _set_idt_entry(129, 8, _asm_isr129, 0, IDT_INTERRUPT);
+    _set_idt_entry(130, 8, _asm_isr130, 0, IDT_INTERRUPT);
+    _set_idt_entry(131, 8, _asm_isr131, 0, IDT_INTERRUPT);
+    _set_idt_entry(132, 8, _asm_isr132, 0, IDT_INTERRUPT);
+    _set_idt_entry(133, 8, _asm_isr133, 0, IDT_INTERRUPT);
+    _set_idt_entry(134, 8, _asm_isr134, 0, IDT_INTERRUPT);
+    _set_idt_entry(135, 8, _asm_isr135, 0, IDT_INTERRUPT);
+    _set_idt_entry(136, 8, _asm_isr136, 0, IDT_INTERRUPT);
+    _set_idt_entry(137, 8, _asm_isr137, 0, IDT_INTERRUPT);
+    _set_idt_entry(138, 8, _asm_isr138, 0, IDT_INTERRUPT);
+    _set_idt_entry(139, 8, _asm_isr139, 0, IDT_INTERRUPT);
+    _set_idt_entry(140, 8, _asm_isr140, 0, IDT_INTERRUPT);
+    _set_idt_entry(141, 8, _asm_isr141, 0, IDT_INTERRUPT);
+    _set_idt_entry(142, 8, _asm_isr142, 0, IDT_INTERRUPT);
+    _set_idt_entry(143, 8, _asm_isr143, 0, IDT_INTERRUPT);
+    _set_idt_entry(144, 8, _asm_isr144, 0, IDT_INTERRUPT);
+    _set_idt_entry(145, 8, _asm_isr145, 0, IDT_INTERRUPT);
+    _set_idt_entry(146, 8, _asm_isr146, 0, IDT_INTERRUPT);
+    _set_idt_entry(147, 8, _asm_isr147, 0, IDT_INTERRUPT);
+    _set_idt_entry(148, 8, _asm_isr148, 0, IDT_INTERRUPT);
+    _set_idt_entry(149, 8, _asm_isr149, 0, IDT_INTERRUPT);
+    _set_idt_entry(150, 8, _asm_isr150, 0, IDT_INTERRUPT);
+    _set_idt_entry(151, 8, _asm_isr151, 0, IDT_INTERRUPT);
+    _set_idt_entry(152, 8, _asm_isr152, 0, IDT_INTERRUPT);
+    _set_idt_entry(153, 8, _asm_isr153, 0, IDT_INTERRUPT);
+    _set_idt_entry(154, 8, _asm_isr154, 0, IDT_INTERRUPT);
+    _set_idt_entry(155, 8, _asm_isr155, 0, IDT_INTERRUPT);
+    _set_idt_entry(156, 8, _asm_isr156, 0, IDT_INTERRUPT);
+    _set_idt_entry(157, 8, _asm_isr157, 0, IDT_INTERRUPT);
+    _set_idt_entry(158, 8, _asm_isr158, 0, IDT_INTERRUPT);
+    _set_idt_entry(159, 8, _asm_isr159, 0, IDT_INTERRUPT);
+    _set_idt_entry(160, 8, _asm_isr160, 0, IDT_INTERRUPT);
+    _set_idt_entry(161, 8, _asm_isr161, 0, IDT_INTERRUPT);
+    _set_idt_entry(162, 8, _asm_isr162, 0, IDT_INTERRUPT);
+    _set_idt_entry(163, 8, _asm_isr163, 0, IDT_INTERRUPT);
+    _set_idt_entry(164, 8, _asm_isr164, 0, IDT_INTERRUPT);
+    _set_idt_entry(165, 8, _asm_isr165, 0, IDT_INTERRUPT);
+    _set_idt_entry(166, 8, _asm_isr166, 0, IDT_INTERRUPT);
+    _set_idt_entry(167, 8, _asm_isr167, 0, IDT_INTERRUPT);
+    _set_idt_entry(168, 8, _asm_isr168, 0, IDT_INTERRUPT);
+    _set_idt_entry(169, 8, _asm_isr169, 0, IDT_INTERRUPT);
+    _set_idt_entry(170, 8, _asm_isr170, 0, IDT_INTERRUPT);
+    _set_idt_entry(171, 8, _asm_isr171, 0, IDT_INTERRUPT);
+    _set_idt_entry(172, 8, _asm_isr172, 0, IDT_INTERRUPT);
+    _set_idt_entry(173, 8, _asm_isr173, 0, IDT_INTERRUPT);
+    _set_idt_entry(174, 8, _asm_isr174, 0, IDT_INTERRUPT);
+    _set_idt_entry(175, 8, _asm_isr175, 0, IDT_INTERRUPT);
+    _set_idt_entry(176, 8, _asm_isr176, 0, IDT_INTERRUPT);
+    _set_idt_entry(177, 8, _asm_isr177, 0, IDT_INTERRUPT);
+    _set_idt_entry(178, 8, _asm_isr178, 0, IDT_INTERRUPT);
+    _set_idt_entry(179, 8, _asm_isr179, 0, IDT_INTERRUPT);
+    _set_idt_entry(180, 8, _asm_isr180, 0, IDT_INTERRUPT);
+    _set_idt_entry(181, 8, _asm_isr181, 0, IDT_INTERRUPT);
+    _set_idt_entry(182, 8, _asm_isr182, 0, IDT_INTERRUPT);
+    _set_idt_entry(183, 8, _asm_isr183, 0, IDT_INTERRUPT);
+    _set_idt_entry(184, 8, _asm_isr184, 0, IDT_INTERRUPT);
+    _set_idt_entry(185, 8, _asm_isr185, 0, IDT_INTERRUPT);
+    _set_idt_entry(186, 8, _asm_isr186, 0, IDT_INTERRUPT);
+    _set_idt_entry(187, 8, _asm_isr187, 0, IDT_INTERRUPT);
+    _set_idt_entry(188, 8, _asm_isr188, 0, IDT_INTERRUPT);
+    _set_idt_entry(189, 8, _asm_isr189, 0, IDT_INTERRUPT);
+    _set_idt_entry(190, 8, _asm_isr190, 0, IDT_INTERRUPT);
+    _set_idt_entry(191, 8, _asm_isr191, 0, IDT_INTERRUPT);
+    _set_idt_entry(192, 8, _asm_isr192, 0, IDT_INTERRUPT);
+    _set_idt_entry(193, 8, _asm_isr193, 0, IDT_INTERRUPT);
+    _set_idt_entry(194, 8, _asm_isr194, 0, IDT_INTERRUPT);
+    _set_idt_entry(195, 8, _asm_isr195, 0, IDT_INTERRUPT);
+    _set_idt_entry(196, 8, _asm_isr196, 0, IDT_INTERRUPT);
+    _set_idt_entry(197, 8, _asm_isr197, 0, IDT_INTERRUPT);
+    _set_idt_entry(198, 8, _asm_isr198, 0, IDT_INTERRUPT);
+    _set_idt_entry(199, 8, _asm_isr199, 0, IDT_INTERRUPT);
+    _set_idt_entry(200, 8, _asm_isr200, 0, IDT_INTERRUPT);
+    _set_idt_entry(201, 8, _asm_isr201, 0, IDT_INTERRUPT);
+    _set_idt_entry(202, 8, _asm_isr202, 0, IDT_INTERRUPT);
+    _set_idt_entry(203, 8, _asm_isr203, 0, IDT_INTERRUPT);
+    _set_idt_entry(204, 8, _asm_isr204, 0, IDT_INTERRUPT);
+    _set_idt_entry(205, 8, _asm_isr205, 0, IDT_INTERRUPT);
+    _set_idt_entry(206, 8, _asm_isr206, 0, IDT_INTERRUPT);
+    _set_idt_entry(207, 8, _asm_isr207, 0, IDT_INTERRUPT);
+    _set_idt_entry(208, 8, _asm_isr208, 0, IDT_INTERRUPT);
+    _set_idt_entry(209, 8, _asm_isr209, 0, IDT_INTERRUPT);
+    _set_idt_entry(210, 8, _asm_isr210, 0, IDT_INTERRUPT);
+    _set_idt_entry(211, 8, _asm_isr211, 0, IDT_INTERRUPT);
+    _set_idt_entry(212, 8, _asm_isr212, 0, IDT_INTERRUPT);
+    _set_idt_entry(213, 8, _asm_isr213, 0, IDT_INTERRUPT);
+    _set_idt_entry(214, 8, _asm_isr214, 0, IDT_INTERRUPT);
+    _set_idt_entry(215, 8, _asm_isr215, 0, IDT_INTERRUPT);
+    _set_idt_entry(216, 8, _asm_isr216, 0, IDT_INTERRUPT);
+    _set_idt_entry(217, 8, _asm_isr217, 0, IDT_INTERRUPT);
+    _set_idt_entry(218, 8, _asm_isr218, 0, IDT_INTERRUPT);
+    _set_idt_entry(219, 8, _asm_isr219, 0, IDT_INTERRUPT);
+    _set_idt_entry(220, 8, _asm_isr220, 0, IDT_INTERRUPT);
+    _set_idt_entry(221, 8, _asm_isr221, 0, IDT_INTERRUPT);
+    _set_idt_entry(222, 8, _asm_isr222, 0, IDT_INTERRUPT);
+    _set_idt_entry(223, 8, _asm_isr223, 0, IDT_INTERRUPT);
+    _set_idt_entry(224, 8, _asm_isr224, 0, IDT_INTERRUPT);
+    _set_idt_entry(225, 8, _asm_isr225, 0, IDT_INTERRUPT);
+    _set_idt_entry(226, 8, _asm_isr226, 0, IDT_INTERRUPT);
+    _set_idt_entry(227, 8, _asm_isr227, 0, IDT_INTERRUPT);
+    _set_idt_entry(228, 8, _asm_isr228, 0, IDT_INTERRUPT);
+    _set_idt_entry(229, 8, _asm_isr229, 0, IDT_INTERRUPT);
+    _set_idt_entry(230, 8, _asm_isr230, 0, IDT_INTERRUPT);
+    _set_idt_entry(231, 8, _asm_isr231, 0, IDT_INTERRUPT);
+    _set_idt_entry(232, 8, _asm_isr232, 0, IDT_INTERRUPT);
+    _set_idt_entry(233, 8, _asm_isr233, 0, IDT_INTERRUPT);
+    _set_idt_entry(234, 8, _asm_isr234, 0, IDT_INTERRUPT);
+    _set_idt_entry(235, 8, _asm_isr235, 0, IDT_INTERRUPT);
+    _set_idt_entry(236, 8, _asm_isr236, 0, IDT_INTERRUPT);
+    _set_idt_entry(237, 8, _asm_isr237, 0, IDT_INTERRUPT);
+    _set_idt_entry(238, 8, _asm_isr238, 0, IDT_INTERRUPT);
+    _set_idt_entry(239, 8, _asm_isr239, 0, IDT_INTERRUPT);
+    _set_idt_entry(240, 8, _asm_isr240, 0, IDT_INTERRUPT);
+    _set_idt_entry(241, 8, _asm_isr241, 0, IDT_INTERRUPT);
+    _set_idt_entry(242, 8, _asm_isr242, 0, IDT_INTERRUPT);
+    _set_idt_entry(243, 8, _asm_isr243, 0, IDT_INTERRUPT);
+    _set_idt_entry(244, 8, _asm_isr244, 0, IDT_INTERRUPT);
+    _set_idt_entry(245, 8, _asm_isr245, 0, IDT_INTERRUPT);
+    _set_idt_entry(246, 8, _asm_isr246, 0, IDT_INTERRUPT);
+    _set_idt_entry(247, 8, _asm_isr247, 0, IDT_INTERRUPT);
+    _set_idt_entry(248, 8, _asm_isr248, 0, IDT_INTERRUPT);
+    _set_idt_entry(249, 8, _asm_isr249, 0, IDT_INTERRUPT);
+    _set_idt_entry(250, 8, _asm_isr250, 0, IDT_INTERRUPT);
+    _set_idt_entry(251, 8, _asm_isr251, 0, IDT_INTERRUPT);
+    _set_idt_entry(252, 8, _asm_isr252, 0, IDT_INTERRUPT);
+    _set_idt_entry(253, 8, _asm_isr253, 0, IDT_INTERRUPT);
+    _set_idt_entry(254, 8, _asm_isr254, 0, IDT_INTERRUPT);
+    _set_idt_entry(255, 8, _asm_isr255, 0, IDT_INTERRUPT);
+}
diff --git a/lunaix-os/scripts/x86_idt_generator.py b/lunaix-os/scripts/x86_idt_generator.py
new file mode 100644
index 0000000..a9af92c
--- /dev/null
+++ b/lunaix-os/scripts/x86_idt_generator.py
@@ -0,0 +1,147 @@
+from pathlib import Path
+
+intr_handler_h = "arch/x86/intrhnds.h"
+intr_handler_c = "kernel/asm/x86/intrhnds.c"
+intr_handler_s = "kernel/asm/x86/intrhnds.S"
+
+
+# default value for each interrupt vector config
+
+config = {
+    '8': {
+        'with_errno': True
+    },
+    '10': {
+        'with_errno': True
+    },
+    '11': {
+        'with_errno': True
+    },
+    '12': {
+        'with_errno': True
+    },
+    '13': {
+        'with_errno': True
+    },
+    '14': {
+        'with_errno': True
+    },
+    '17': {
+        'with_errno': True
+    },
+    '33': {
+        'dpl': 3
+    },
+    'default': {
+        'seg': 0x8,
+        'dpl': 0,
+        'vtype': 'IDT_INTERRUPT',
+        'with_errno': False
+    }
+}
+
+
+def get_workspace() -> Path:
+    file = Path(__file__)
+    return file.parent.parent.absolute()
+
+
+def export_h(src: Path):
+    hfile = src.joinpath("includes", intr_handler_h)
+    code = '\n'.join(["ISR(%s)" % x for x in range(0, 256)])
+    with hfile.open(mode='w+') as f:
+        f.write(f'''
+#ifndef __LUNAIX_INTRHNDS_H
+#define __LUNAIX_INTRHNDS_H
+#define ISR(iv) void _asm_isr##iv();
+{code}
+#endif
+''')
+
+
+def get_vector_config(vec_num, cfg_name):
+    vn = str(vec_num)
+    if vn not in config:
+        return config['default'][cfg_name]
+    attr = config[vn]
+    if cfg_name not in attr:
+        return config['default'][cfg_name]
+    return attr[cfg_name]
+
+
+def export_c(src: Path):
+    cfile = src.joinpath(intr_handler_c)
+    expr_list = []
+    for i in range(0, 256):
+        seg = get_vector_config(i, "seg")
+        dpl = get_vector_config(i, "dpl")
+        vtype = get_vector_config(i, "vtype")
+        expr_list.append(
+            f'    _set_idt_entry({i}, {seg}, _asm_isr{i}, {dpl}, {vtype});')
+    code = '\n'.join(expr_list)
+    with cfile.open(mode='w+') as f:
+        f.write(f'''
+#include <arch/x86/idt.h>
+#include <stdint.h>
+#include <{intr_handler_h}>
+
+#define IDT_ENTRY 256
+
+uint64_t _idt[IDT_ENTRY];
+uint16_t _idt_limit = sizeof(_idt) - 1;
+static inline void
+_set_idt_entry(uint32_t vector,
+               uint16_t seg_selector,
+               void (*isr)(),
+               uint8_t dpl,
+               uint8_t type)
+{{
+    uintptr_t offset = (uintptr_t)isr;
+    _idt[vector] = (offset & 0xffff0000) | IDT_ATTR(dpl, type);
+    _idt[vector] <<= 32;
+    _idt[vector] |= (seg_selector << 16) | (offset & 0x0000ffff);
+}}
+
+void _init_idt() {{
+{code}
+}}
+''')
+
+
+def export_s(src: Path):
+    sfile = src.joinpath(intr_handler_s)
+    expr_list = []
+    for i in range(0, 256):
+        has_errno = get_vector_config(i, "with_errno")
+        expr_list.append(
+            f"    isr_template {i}, no_error_code={'0' if has_errno else '1'}")
+
+    code = '\n'.join(expr_list)
+    marco = '''.macro isr_template vector, no_error_code=1
+    .global _asm_isr\\vector
+    .type _asm_isr\\vector, @function
+    _asm_isr\\vector:
+        .if \\no_error_code
+            pushl $0x0
+        .endif
+        pushl $\\vector
+        jmp interrupt_wrapper
+.endm'''
+    with sfile.open(mode='w+') as f:
+        f.write(f'''
+#define __ASM__
+{marco}
+.section .text
+{code}
+''')
+
+
+def main():
+    src = get_workspace()
+    export_h(src)
+    export_c(src)
+    export_s(src)
+
+
+if __name__ == "__main__":
+    main()
-- 
2.27.0