lunaix-os/hal/ahci/ahci_pci.c

   1 #include <lunaix/spike.h>
   2
   3 #include <hal/ahci/ahci.h>
   4 #include <hal/pci.h>
   5 #include <sys/pci_hba.h>
   6
   7 static int
   8 ahci_pci_bind(struct device_def* def, struct device* dev)
   9 {
  10     struct pci_device* ahci_dev = container_of(dev, struct pci_device, dev);
  11
  12     struct pci_base_addr* bar6 = &ahci_dev->bar[5];
  13     assert_msg(bar6->type & BAR_TYPE_MMIO, "AHCI: BAR#6 is not MMIO.");
  14
  15     pci_reg_t cmd = pci_read_cspace(ahci_dev->cspace_base, PCI_REG_STATUS_CMD);
  16
  17     // 禁用传统中断（因为我们使用MSI），启用MMIO访问，允许PCI设备间访问
  18     cmd |= (PCI_RCMD_MM_ACCESS | PCI_RCMD_DISABLE_INTR | PCI_RCMD_BUS_MASTER);
  19
  20     pci_write_cspace(ahci_dev->cspace_base, PCI_REG_STATUS_CMD, cmd);
  21
  22     int iv = isrm_ivexalloc(ahci_hba_isr);
  23     pci_setup_msi(ahci_dev, iv);
  24
  25     struct ahci_driver_param param = {
  26         .mmio_base = bar6->start,
  27         .mmio_size = bar6->size,
  28         .ahci_iv = iv,
  29     };
  30
  31     struct ahci_driver* ahci_drv = ahci_driver_init(&param);
  32     pci_bind_instance(ahci_dev, ahci_drv);
  33
  34     return 0;
  35 }
  36
  37 static int
  38 ahci_pci_init(struct device_def* def)
  39 {
  40     return pci_bind_definition_all(pcidev_def(def));
  41 }
  42
  43 static struct pci_device_def ahcidef = {
  44     .dev_class = AHCI_HBA_CLASS,
  45     .ident_mask = PCI_MATCH_ANY,
  46     .devdef = { .class = DEVCLASS(DEVIF_PCI, DEVFN_STORAGE, DEV_SATA),
  47                 .name = "Generic SATA",
  48                 .init = ahci_pci_init,
  49                 .bind = ahci_pci_bind }
  50 };
  51 EXPORT_PCI_DEVICE(ahci, &ahcidef, load_postboot);