12 #define HBA_RPBASE (0x40)
13 #define HBA_RPSIZE (0x80 >> 2)
21 #define HBA_RPxSSTS 10
22 #define HBA_RPxSCTL 11
23 #define HBA_RPxSERR 12
24 #define HBA_RPxSACT 13
26 #define HBA_RPxSNTF 15
29 #define HBA_PxCMD_FRE (1 << 4)
30 #define HBA_PxCMD_CR (1 << 15)
31 #define HBA_PxCMD_FR (1 << 14)
32 #define HBA_PxCMD_ST (1)
33 #define HBA_PxINTR_DMA (1 << 2)
34 #define HBA_PxINTR_D2HR (1)
36 #define HBA_RGHC_ACHI_ENABLE (1 << 31)
37 #define HBA_RGHC_INTR_ENABLE (1 << 1)
38 #define HBA_RGHC_RESET 1
40 #define HBA_RPxSSTS_PWR(x) (((x) >> 8) & 0xf)
41 #define HBA_RPxSSTS_IF(x) (((x) >> 4) & 0xf)
42 #define HBA_RPxSSTS_PHYSTATE(x) ((x)&0xf)
44 #define HBA_DEV_SIG_ATAPI 0xeb140101
45 #define HBA_DEV_SIG_ATA 0x00000101
47 #define __HBA_PACKED__ __attribute__((packed))
49 typedef unsigned int hba_reg_t;
51 #define HBA_CMDH_FIS_LEN(fis_bytes) (((fis_bytes) / 4) & 0x1f)
52 #define HBA_CMDH_ATAPI (1 << 5)
53 #define HBA_CMDH_WRITE (1 << 6)
54 #define HBA_CMDH_PREFETCH (1 << 7)
55 #define HBA_CMDH_R (1 << 8)
56 #define HBA_CMDH_CLR_BUSY (1 << 10)
57 #define HBA_CMDH_PRDT_LEN(entries) (((entries)&0xffff) << 16)
63 uint32_t transferred_size;
64 uint32_t cmd_table_base;
68 #define HBA_PRDTE_BYTE_CNT(cnt) ((cnt & 0x3FFFFF) | 0x1)
79 uint8_t command_fis[64];
80 uint8_t atapi_cmd[16];
81 uint8_t reserved[0x30];
82 struct hba_prdte entries[3];
98 volatile hba_reg_t* regs;
100 struct hba_cmdh* cmdlst;
101 struct sata_fis_head* fis;
102 struct hba_device* device;
107 volatile hba_reg_t* base;
108 unsigned int ports_num;
109 unsigned int cmd_slots;
110 unsigned int version;
111 struct hba_port* ports[32];
115 hba_alloc_slot(struct hba_port* port,
116 struct hba_cmdt** cmdt,
117 struct hba_cmdh** cmdh,
118 uint16_t header_options);
120 #endif /* __LUNAIX_HBA_H */