1 #include <hal/acpi/acpi.h>
2 #include <hal/ioapic.h>
3 #include <klibc/stdio.h>
4 #include <lunaix/isrm.h>
5 #include <lunaix/lxconsole.h>
6 #include <lunaix/peripheral/serial.h>
7 #include <lunaix/syslog.h>
8 #include <sdbg/gdbstub.h>
9 #include <sdbg/lsdbg.h>
10 #include <sdbg/protocol.h>
12 // #define USE_LSDBG_BACKEND
16 volatile int debug_mode = 0;
19 sdbg_loop(const isr_param* param)
21 // This is importnat, because we will handle any subsequent RX/TX in a
22 // synchronized way. And we don't want these irq queue up at our APIC and
23 // confuse the CPU after ACK with APIC.
24 serial_disable_irq(SERIAL_COM1);
25 if (param->vector == 1 || param->vector == 3) {
30 // Oh... C.M.C. is about to help the debugging!
31 if (serial_rx_byte(SERIAL_COM1) != '@') {
34 if (serial_rx_byte(SERIAL_COM1) != 'c') {
37 if (serial_rx_byte(SERIAL_COM1) != 'm') {
40 if (serial_rx_byte(SERIAL_COM1) != 'c') {
45 if (serial_rx_byte(SERIAL_COM1) != '@') {
48 if (serial_rx_byte(SERIAL_COM1) != 'y') {
51 if (serial_rx_byte(SERIAL_COM1) != 'a') {
54 if (serial_rx_byte(SERIAL_COM1) != 'y') {
63 #ifdef USE_LSDBG_BACKEND
64 lunaix_sdbg_loop(param);
71 serial_enable_irq(SERIAL_COM1);
75 sdbg_imm(const isr_param* param)
77 kprintf(KDEBUG "Quick debug mode\n");
78 kprintf(KDEBUG "cs=%p eip=%p eax=%p ebx=%p\n",
82 param->registers.ebx);
83 kprintf(KDEBUG "ecx=%p edx=%p edi=%p esi=%p\n",
87 param->registers.esi);
88 kprintf(KDEBUG "u.esp=%p k.esp=%p ebp=%p ps=%p\n",
93 kprintf(KDEBUG "ss=%p ds=%p es=%p fs=%p gs=%p\n",
106 isrm_bindiv(INSTR_DEBUG, sdbg_loop); // #DB
107 isrm_bindiv(INSTR_BREAK, sdbg_loop); // #BRK
109 isrm_bindirq(COM1_IRQ, sdbg_loop);