3 * @author Lunaixsky (zelong56@gmail.com)
4 * @brief A software implementation of Serial ATA AHCI 1.3.1 Specification
8 * @copyright Copyright (c) 2022
11 #include <hal/ahci/ahci.h>
12 #include <hal/ahci/hba.h>
13 #include <hal/ahci/sata.h>
14 #include <hal/ahci/scsi.h>
17 #include <sys/pci_hba.h>
18 #include <sys/port_io.h>
20 #include <klibc/string.h>
21 #include <lunaix/block.h>
22 #include <lunaix/isrm.h>
23 #include <lunaix/mm/mmio.h>
24 #include <lunaix/mm/pmm.h>
25 #include <lunaix/mm/valloc.h>
26 #include <lunaix/mm/vmm.h>
27 #include <lunaix/spike.h>
28 #include <lunaix/syslog.h>
30 #define HBA_FIS_SIZE 256
31 #define HBA_CLB_SIZE 1024
33 #define HBA_MY_IE (HBA_PxINTR_DHR | HBA_PxINTR_TFE | HBA_PxINTR_OF)
34 #define AHCI_DEVCLASS DEVCLASS(DEVIF_PCI, DEVFN_STORAGE, DEV_SATA, 0)
36 // #define DO_HBA_FULL_RESET
42 static char sata_ifs[][20] = { "Not detected",
45 "SATA III (6.0Gbps)" };
47 static struct devclass ahci_class = AHCI_DEVCLASS;
50 ahci_fsexport(struct block_dev* bdev, void* fs_node);
53 __ahci_hba_isr(const isr_param* param);
56 __ahci_blkio_handler(struct blkio_req* req);
59 ahci_init_device(struct hba_port* port);
62 achi_register_ops(struct hba_port* port);
65 ahci_register_device(struct hba_device* hbadev);
68 __hba_reset_port(hba_reg_t* port_reg)
70 // 根据:SATA-AHCI spec section 10.4.2 描述的端口重置流程
71 port_reg[HBA_RPxCMD] &= ~HBA_PxCMD_ST;
72 port_reg[HBA_RPxCMD] &= ~HBA_PxCMD_FRE;
73 int cnt = wait_until_expire(!(port_reg[HBA_RPxCMD] & HBA_PxCMD_CR), 500000);
78 port_reg[HBA_RPxSCTL] = (port_reg[HBA_RPxSCTL] & ~0xf) | 1;
79 port_delay(100000); // 等待至少一毫秒,差不多就行了
80 port_reg[HBA_RPxSCTL] &= ~0xf;
84 ahci_driver_init(struct device_def* def, struct device* dev)
86 struct pci_device* ahci_dev = container_of(dev, struct pci_device, dev);
88 struct pci_base_addr* bar6 = &ahci_dev->bar[5];
89 assert_msg(bar6->type & BAR_TYPE_MMIO, "AHCI: BAR#6 is not MMIO.");
91 pci_reg_t cmd = pci_read_cspace(ahci_dev->cspace_base, PCI_REG_STATUS_CMD);
93 // 禁用传统中断(因为我们使用MSI),启用MMIO访问,允许PCI设备间访问
94 cmd |= (PCI_RCMD_MM_ACCESS | PCI_RCMD_DISABLE_INTR | PCI_RCMD_BUS_MASTER);
96 pci_write_cspace(ahci_dev->cspace_base, PCI_REG_STATUS_CMD, cmd);
98 int iv = isrm_ivexalloc(__ahci_hba_isr);
99 pci_setup_msi(ahci_dev, iv);
100 isrm_set_payload(iv, (ptr_t)&ahcis);
102 struct ahci_driver* ahci_drv = vzalloc(sizeof(*ahci_drv));
103 struct ahci_hba* hba = &ahci_drv->hba;
106 llist_append(&ahcis, &ahci_drv->ahci_drvs);
108 hba->base = (hba_reg_t*)ioremap(bar6->start, bar6->size);
110 #ifdef DO_HBA_FULL_RESET
112 hba->base[HBA_RGHC] |= HBA_RGHC_RESET;
113 wait_until(!(hba->base[HBA_RGHC] & HBA_RGHC_RESET));
117 hba->base[HBA_RGHC] |= HBA_RGHC_ACHI_ENABLE;
118 hba->base[HBA_RGHC] |= HBA_RGHC_INTR_ENABLE;
120 // As per section 3.1.1, this is 0 based value.
121 hba_reg_t cap = hba->base[HBA_RCAP];
122 hba_reg_t pmap = hba->base[HBA_RPI];
124 hba->ports_num = (cap & 0x1f) + 1; // CAP.PI
125 hba->cmd_slots = (cap >> 8) & 0x1f; // CAP.NCS
126 hba->version = hba->base[HBA_RVER];
127 hba->ports_bmp = pmap;
129 /* ------ HBA端口配置 ------ */
130 ptr_t clb_pg_addr = 0, fis_pg_addr = 0;
131 ptr_t clb_pa = 0, fis_pa = 0;
133 for (size_t i = 0, fisp = 0, clbp = 0; i < 32;
134 i++, pmap >>= 1, fisp = (fisp + 1) % 16, clbp = (clbp + 1) % 4) {
139 struct hba_port* port =
140 (struct hba_port*)valloc(sizeof(struct hba_port));
141 hba_reg_t* port_regs =
142 (hba_reg_t*)(&hba->base[HBA_RPBASE + i * HBA_RPSIZE]);
144 #ifndef DO_HBA_FULL_RESET
145 __hba_reset_port(port_regs);
150 clb_pa = pmm_alloc_page(KERNEL_PID, PP_FGLOCKED);
151 clb_pg_addr = (ptr_t)ioremap(clb_pa, 0x1000);
152 memset((void*)clb_pg_addr, 0, 0x1000);
156 fis_pa = pmm_alloc_page(KERNEL_PID, PP_FGLOCKED);
157 fis_pg_addr = (ptr_t)ioremap(fis_pa, 0x1000);
158 memset((void*)fis_pg_addr, 0, 0x1000);
162 port_regs[HBA_RPxCLB] = clb_pa + clbp * HBA_CLB_SIZE;
163 port_regs[HBA_RPxFB] = fis_pa + fisp * HBA_FIS_SIZE;
165 *port = (struct hba_port){
167 .ssts = port_regs[HBA_RPxSSTS],
168 .cmdlst = (struct hba_cmdh*)(clb_pg_addr + clbp * HBA_CLB_SIZE),
169 .fis = (void*)(fis_pg_addr + fisp * HBA_FIS_SIZE),
174 port_regs[HBA_RPxCI] = 0;
176 hba_clear_reg(port_regs[HBA_RPxSERR]);
178 hba->ports[i] = port;
180 if (!HBA_RPxSSTS_IF(port->ssts)) {
184 wait_until(!(port_regs[HBA_RPxCMD] & HBA_PxCMD_CR));
185 port_regs[HBA_RPxCMD] |= HBA_PxCMD_FRE;
186 port_regs[HBA_RPxCMD] |= HBA_PxCMD_ST;
188 if (!ahci_init_device(port)) {
189 kprintf(KERROR "init fail: 0x%x@p%d\n", port->regs[HBA_RPxSIG], i);
193 struct hba_device* hbadev = port->device;
194 kprintf(KINFO "sata%d: %s, blk_size=%d, blk=0..%d\n",
198 (u32_t)hbadev->max_lba);
200 ahci_register_device(hbadev);
203 dev->underlay = ahci_drv;
208 ahci_register_device(struct hba_device* hbadev)
210 struct block_dev* bdev =
211 block_alloc_dev(hbadev->model, hbadev, __ahci_blkio_handler);
213 bdev->end_lba = hbadev->max_lba;
214 bdev->blk_size = hbadev->block_size;
215 bdev->class = &ahci_class;
217 block_mount(bdev, ahci_fsexport);
221 __get_free_slot(struct hba_port* port)
223 hba_reg_t pxsact = port->regs[HBA_RPxSACT];
224 hba_reg_t pxci = port->regs[HBA_RPxCI];
225 hba_reg_t free_bmp = pxsact | pxci;
227 for (; i <= port->hba->cmd_slots && (free_bmp & 0x1); i++, free_bmp >>= 1)
229 return i | -(i > port->hba->cmd_slots);
233 sata_create_fis(struct sata_reg_fis* cmd_fis,
238 cmd_fis->head.type = SATA_REG_FIS_H2D;
239 cmd_fis->head.options = SATA_REG_FIS_COMMAND;
240 cmd_fis->head.status_cmd = command;
243 cmd_fis->lba0 = SATA_LBA_COMPONENT(lba, 0);
244 cmd_fis->lba8 = SATA_LBA_COMPONENT(lba, 8);
245 cmd_fis->lba16 = SATA_LBA_COMPONENT(lba, 16);
246 cmd_fis->lba24 = SATA_LBA_COMPONENT(lba, 24);
248 cmd_fis->lba32 = SATA_LBA_COMPONENT(lba, 32);
249 cmd_fis->lba40 = SATA_LBA_COMPONENT(lba, 40);
251 cmd_fis->count = sector_count;
255 hba_bind_sbuf(struct hba_cmdh* cmdh, struct hba_cmdt* cmdt, struct membuf mbuf)
257 assert_msg(mbuf.size <= 0x400000U, "HBA: Buffer too big");
260 (struct hba_prdte){ .data_base = vmm_v2p((ptr_t)mbuf.buffer),
261 .byte_count = mbuf.size - 1 };
267 hba_bind_vbuf(struct hba_cmdh* cmdh, struct hba_cmdt* cmdt, struct vecbuf* vbuf)
270 struct vecbuf* pos = vbuf;
273 assert_msg(i < HBA_MAX_PRDTE, "HBA: Too many PRDTEs");
274 assert_msg(pos->buf.size <= 0x400000U, "HBA: Buffer too big");
277 (struct hba_prdte){ .data_base = vmm_v2p((ptr_t)pos->buf.buffer),
278 .byte_count = pos->buf.size - 1 };
279 pos = list_entry(pos->components.next, struct vecbuf, components);
280 } while (pos != vbuf);
282 cmdh->prdt_len = i + 1;
288 hba_prepare_cmd(struct hba_port* port,
289 struct hba_cmdt** cmdt,
290 struct hba_cmdh** cmdh)
292 int slot = __get_free_slot(port);
293 assert_msg(slot >= 0, "HBA: No free slot");
295 // 构建命令头(Command Header)和命令表(Command Table)
296 struct hba_cmdh* cmd_header = &port->cmdlst[slot];
297 struct hba_cmdt* cmd_table = vzalloc_dma(sizeof(struct hba_cmdt));
299 memset(cmd_header, 0, sizeof(*cmd_header));
302 cmd_header->cmd_table_base = vmm_v2p((ptr_t)cmd_table);
303 cmd_header->options =
304 HBA_CMDH_FIS_LEN(sizeof(struct sata_reg_fis)) | HBA_CMDH_CLR_BUSY;
313 ahci_init_device(struct hba_port* port)
315 /* 发送ATA命令,参考:SATA AHCI Spec Rev.1.3.1, section 5.5 */
316 struct hba_cmdt* cmd_table;
317 struct hba_cmdh* cmd_header;
319 // mask DHR interrupt
320 port->regs[HBA_RPxIE] &= ~HBA_MY_IE;
322 // 预备DMA接收缓存,用于存放HBA传回的数据
323 u16_t* data_in = (u16_t*)valloc_dma(512);
325 int slot = hba_prepare_cmd(port, &cmd_table, &cmd_header);
327 cmd_header, cmd_table, (struct membuf){ .buffer = data_in, .size = 512 });
329 port->device = vzalloc(sizeof(struct hba_device));
330 port->device->port = port;
331 port->device->hba = port->hba;
334 struct sata_reg_fis* cmd_fis = (struct sata_reg_fis*)cmd_table->command_fis;
337 if (port->regs[HBA_RPxSIG] == HBA_DEV_SIG_ATA) {
339 sata_create_fis(cmd_fis, ATA_IDENTIFY_DEVICE, 0, 0);
341 // ATAPI 一般为光驱,软驱,或者磁带机
342 port->device->flags |= HBA_DEV_FATAPI;
343 sata_create_fis(cmd_fis, ATA_IDENTIFY_PAKCET_DEVICE, 0, 0);
346 if (!ahci_try_send(port, slot)) {
352 解析IDENTIFY DEVICE传回来的数据。
354 * ATA/ATAPI Command Set - 3 (ACS-3), Section 7.12.7
356 ahci_parse_dev_info(port->device, data_in);
358 if (!(port->device->flags & HBA_DEV_FATAPI)) {
363 注意:ATAPI设备是无法通过IDENTIFY PACKET DEVICE 获取容量信息的。
364 我们需要使用SCSI命令的READ_CAPACITY(16)进行获取。
366 1. 因为ATAPI走的是SCSI,而AHCI对此专门进行了SATA的封装,
367 也就是通过SATA的PACKET命令对SCSI命令进行封装。所以我们
369 2. 接着,在ACMD中构建命令READ_CAPACITY的CDB - 一种SCSI命令的封装
370 3. 然后把cmd_header->options的A位置位,表示这是一个送往ATAPI的命令。
372 1. HBA往底层SATA控制器发送PACKET FIS
373 2. SATA控制器回复PIO Setup FIS
374 3. HBA读入ACMD中的CDB,打包成Data FIS进行答复
375 4. SATA控制器解包,拿到CDB,通过SCSI协议转发往ATAPI设备。
376 5. ATAPI设备回复Return Parameter,SATA通过DMA Setup FIS
377 发起DMA请求,HBA介入,将Return Parameter写入我们在PRDT
379 4. 最后照常等待HBA把结果写入data_in,然后直接解析就好了。
381 * ATA/ATAPI Command Set - 3 (ACS-3), Section 7.18
382 * SATA AHCI HBA Spec, Section 5.3.7
383 * SCSI Command Reference Manual, Section 3.26
386 sata_create_fis(cmd_fis, ATA_PACKET, 512 << 8, 0);
388 // for dev use 12 bytes cdb, READ_CAPACITY must use the 10 bytes variation.
389 if (port->device->cbd_size == SCSI_CDB12) {
390 struct scsi_cdb12* cdb12 = (struct scsi_cdb12*)cmd_table->atapi_cmd;
391 // ugly tricks to construct 10 byte cdb from 12 byte cdb
392 scsi_create_packet12(cdb12, SCSI_READ_CAPACITY_10, 0, 512 << 8);
394 struct scsi_cdb16* cdb16 = (struct scsi_cdb16*)cmd_table->atapi_cmd;
395 scsi_create_packet16(cdb16, SCSI_READ_CAPACITY_16, 0, 512);
396 cdb16->misc1 = 0x10; // service action
399 cmd_header->transferred_size = 0;
400 cmd_header->options |= HBA_CMDH_ATAPI;
402 if (!ahci_try_send(port, slot)) {
406 scsi_parse_capacity(port->device, (u32_t*)data_in);
409 // reset interrupt status and unmask D2HR interrupt
410 port->regs[HBA_RPxIE] |= HBA_MY_IE;
411 achi_register_ops(port);
414 vfree_dma(cmd_table);
419 port->regs[HBA_RPxIE] |= HBA_MY_IE;
421 vfree_dma(cmd_table);
427 ahci_identify_device(struct hba_device* device)
429 // 用于重新识别设备(比如在热插拔的情况下)
431 return ahci_init_device(device->port);
435 achi_register_ops(struct hba_port* port)
437 port->device->ops.identify = ahci_identify_device;
438 if (!(port->device->flags & HBA_DEV_FATAPI)) {
439 port->device->ops.submit = sata_submit;
441 port->device->ops.submit = scsi_submit;
445 static struct pci_device_def ahcidef = {
446 .dev_class = AHCI_HBA_CLASS,
447 .dev_vendor = PCI_ID_ANY,
448 .dev_id = PCI_ID_ANY,
449 .devdef = { .class = DEVCLASS(DEVIF_PCI, DEVFN_STORAGE, DEV_SATA, 0),
450 .name = "Serial ATA Controller",
451 .init_for = ahci_driver_init }
453 EXPORT_DEVICE(ahci, &ahcidef.devdef, load_on_demand);